rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: High-speed CMOS Circuits for Optical Receivers
  name:
    name part: Savoj, Jafar.
    role:
      role term: creator
    role:
      role term: author.
  name:
    name part: Razavi, Behzad.
    role:
      role term: author.
  name:
    name part: SpringerLink (Online service)
  type of resource: text
  origin info:
    place:
      place term: xxu
    date issued: 2001
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: electronic
    form: electronic resource
    reformatting quality: access
    form: remote
    extent: XIV, 124 p. online resource.
  abstract: With the exponential growth of the number of Internet nodes, the volume of the data transported on the backbone has increased with the same trend. The load of the global Internet backbone will soon increase to tens of terabits per second. This indicates that the backbone bandwidth requirements will increase by a factor of 50 to 100 every seven years. Transportation of such high volumes of data requires suitable media with low loss and high bandwidth. Among the available transmission media, optical fibers achieve the best performance in terms of loss and bandwidth. High-speed data can be transported over hundreds of kilometers of single-mode fiber without significant loss in signal integrity. These fibers progressively benefit from reduction of cost and improvement of perf- mance. Meanwhile, the electronic interfaces used in an optical network are not capable of exploiting the ultimate bandwidth of the fiber, limiting the throughput of the network. Different solutions at both the system and the circuit levels have been proposed to increase the data rate of the backbone. System-level solutions are based on the utilization of wave-division multiplexing (WDM), using different colors of light to transmit s- eral sequences simultaneously. In parallel with that, a great deal of effort has been put into increasing the operating rate of the electronic transceivers using highly-developed fabrication processes and novel c- cuit techniques.
  table of contents: TIAs and Limiters -- Clock and Data Recovery Architectures -- A CMOS Interface for Detection of 1.2-Gb / s RZ Data -- A 10-Gb/s Linear Half-rate CMOS CDR Circuit -- A 10-Gb/s CMOS CDR Circuit with Wide Capture Range -- Conclusion.
  note: by Jafar Savoj, Behzad Razavi.
  subject:
    topic: Engineering
  subject:
    topic: Electrical engineering
  subject:
    topic: Electronic circuits
  subject:
    topic: Engineering
  subject:
    topic: Circuits and Systems
  subject:
    topic: Electrical Engineering
  classification: TK7888.4
  classification: 621.3815
  related item:
    title info:
      title: Springer eBooks
  identifier: 9780306475764
  identifier: http://dx.doi.org/10.1007/b117321
  record info:
    record creation date: 100301
    record change date: 20151204155733.0
    record identifier: 978-0-306-47576-4