rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Boundary-Scan Interconnect Diagnosis
  name:
    name part: Sousa, José T. de.
    role:
      role term: creator
    role:
      role term: author.
  name:
    name part: Cheung, Peter Y. K.
    role:
      role term: author.
  name:
    name part: SpringerLink (Online service)
  type of resource: text
  origin info:
    place:
      place term: xxu
    date issued: 2001
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: electronic
    form: electronic resource
    reformatting quality: access
    form: remote
    extent: XXI, 168 p. online resource.
  abstract: Boundary-Scan Interconnect Diagnosis explains how to synthesize digital diagnostic sequences for wire interconnects using boundary-scan, and how to assess the quality of those sequences. Its importance has to do with designing complex electronic systems using pre-designed intellectual property (IP) cores, which is becoming increasingly popular nowadays. Since tests for pre-designed cores can be supplied with the cores themselves, the only additional tests that need to be developed to test and diagnose the entire system are those for wire interconnects between the cores. Besides the trivial solutions that are often used to solve this problem, there are many more methods that enable significant optimizations of test vector length and/or diagnostic resolution. The book surveys all existing methods of this kind and proposes new ones. In the new approach circuit and interconnect faults are carefully modeled, and graph techniques are applied to solve the problem. The original feature of the new method is the fact that it can be adjusted to provide shorter test sequences and/or greater diagnostic resolution. The effectiveness of existing and proposed methods is then evaluated using real electronic assemblies and published statistical data for an actual manufacturing process from HP.
  table of contents: Interconnect Circuit and Fault Models -- Behavioral Interconnect Diagnosis -- Structural Interconnect Diagnosis -- Diagnostic Resolution Assessment -- Experimental Results -- Conclusion.
  note: by José T. de Sousa, Peter Y. K. Cheung.
  subject:
    topic: Engineering
  subject:
    topic: Electrical engineering
  subject:
    topic: Electronic circuits
  subject:
    topic: Engineering
  subject:
    topic: Circuits and Systems
  subject:
    topic: Electrical Engineering
  classification: TK7888.4
  classification: 621.3815
  related item:
    title info:
      title: Springer eBooks
  related item:
    title info:
      title: Frontiers in Electronic Testing, 18
  identifier: 9780306479755
  identifier: http://dx.doi.org/10.1007/b100750
  record info:
    record creation date: 100301
    record change date: 20151204154615.0
    record identifier: 978-0-306-47975-5