http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
System-Level Design Techniques for Energy-Efficient Embedded Systems
System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are applied to numerous benchmarks and real-life examples including a realistic smart phone.
Background -- Power Variation-Driven Dynamic Voltage Scaling -- Optimisation of Mapping and Scheduling for Dynamic Voltage Scaling -- Energy-Efficient Multi-mode Embedded Systems -- Dynamic Voltage Scaling for Control Flow-Intensive Applications -- LOPOCOS: A Prototype Low Power Co-Synthesis Tool -- Conclusion.
by Marcus T. Schmitz, Bashir M. Al-Hashimi, Petru Eles.
Computer-Aided Engineering (CAD, CAE) and Design