rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Equivalence Checking of Digital Circuits
    sub title: Fundamentals, Principles, Methods
  name:
    name part: Molitor, Paul.
    role:
      role term: creator
    role:
      role term: author.
  name:
    name part: Mohnke, Janett.
    role:
      role term: author.
  name:
    name part: Becker, Bernd.
    role:
      role term: author.
  name:
    name part: Scholl, Christoph.
    role:
      role term: author.
  name:
    name part: SpringerLink (Online service)
  type of resource: text
  origin info:
    place:
      place term: xxu
    date issued: 2004
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: electronic
    form: electronic resource
    reformatting quality: access
    form: remote
    extent: XIII, 263 p. online resource.
  abstract: Hardware veri?cation is the process of checking whether a design conforms to its speci?cations of functionality and timing. In today’s design processes it becomes more and more important. Very large scale integrated (VLSI) circuits and the resulting digital systems have conquered a place in almost all areas of our life, even in security sensitive applications. Complex digital systems control airplanes, have been used in banks and on intensive-care units. Hence, the demand for error-free designs is more important than ever. In addition, economic reasons underline this demand as well. The design and production process of present day VLSI-circuits is highly time- and cost-intensive. Mo- over, it is nearly impossible to repair integrated circuits. Thus, it is desirable to detect design errors early in the design process and not just after producing the prototype chip. All these facts are re?ected by developing and prod- tion statistics of present day companies. For example, In?neon Technologies [118] assumed that about 60% to 80% of the overall design time was spent for veri?cation in 2000. Other sources cite the 3-to-1 head count ratio between veri?cation engineers and logic designers. This shows that verifying logical correctness of the design of hardware systems is a major gate to the problem of time-to-market (cf. [113]). With the chip complexity constantly increasing, the dif?culty as well as the - portance of functional veri?cation of new product designs has been increased. It is not only more important to get error-free designs.
  table of contents: Fundamentals -- Preliminaries -- Representation of Boolean and Pseudo Boolean Functions -- Equivalence Checking of Combinational Circuits -- Use of Canonical Data Structures -- SAT and ATPG Based Equivalence Checking -- Exploiting Similarities -- Checking Equivalence for Partial Implementations -- Permutation Independent Boolean Comparison -- Equivalence Checking of Sequential Circuits -- Formal Basics -- The Latch Correspondence Problem.
  note: by Paul Molitor, Janett Mohnke, Bernd Becker, Christoph Scholl.
  subject:
    topic: Engineering
  subject:
    topic: Computers
  subject:
    topic: Computer-aided engineering
  subject:
    topic: Electrical engineering
  subject:
    topic: Electronics
  subject:
    topic: Microelectronics
  subject:
    topic: Electronic circuits
  subject:
    topic: Engineering
  subject:
    topic: Electronics and Microelectronics, Instrumentation
  subject:
    topic: Circuits and Systems
  subject:
    topic: Electrical Engineering
  subject:
    topic: Computing Methodologies
  subject:
    topic: Computer-Aided Engineering (CAD, CAE) and Design
  classification: TK7800-8360
  classification: TK7874-7874.9
  classification: 621.381
  related item:
    title info:
      title: Springer eBooks
  identifier: 9781402026034
  identifier: http://dx.doi.org/10.1007/b105298
  record info:
    record creation date: 100301
    record change date: 20151204150418.0
    record identifier: 978-1-4020-2603-4