rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits
  name:
    name part: Gupta, Sumit.
    role:
      role term: creator
    role:
      role term: author.
  name:
    name part: Gupta, Rajesh K.
    role:
      role term: author.
  name:
    name part: Dutt, Nikil D.
    role:
      role term: author.
  name:
    name part: Nicolau, Alexandru.
    role:
      role term: author.
  name:
    name part: SpringerLink (Online service)
  type of resource: text
  origin info:
    place:
      place term: xxu
    date issued: 2004
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: electronic
    form: electronic resource
    reformatting quality: access
    form: remote
    extent: XXIII, 233 p. online resource.
  abstract: Rapid advances in microelectronic integration and the advent of Systems-on-Chip have fueled the need for high-level synthesis, i.e., an automated approach to the synthesis of hardware from behavioral descriptions. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits presents a novel approach to the high-level synthesis of digital circuits -- that of parallelizing high-level synthesis (PHLS). This approach uses aggressive code parallelizing and code motion techniques to discover circuit optimization opportunities beyond what is possible with traditional high-level synthesis. This PHLS approach addresses the problems of the poor quality of synthesis results and the lack of controllability over the transformations applied during the high-level synthesis of system descriptions with complex control flows, that is, with nested conditionals and loops. Also described are speculative code motion techniques and dynamic compiler transformations that optimize the circuit quality in terms of cycle time, circuit size and interconnect costs. We describe the SPARK parallelizing high-level synthesis framework in which we have implemented these techniques and demonstrate the utility of SPARK's PHLS approach using designs derived from multimedia and image processing applications. We also present a case study of an instruction length decoder derived from the Intel Pentium-class of microprocessors. This case study serves as an example of a typical microprocessor functional block with complex control flow and demonstrates how our techniques are useful for such designs. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits is targeted mainly to embedded system designers and researchers. This includes people working on design and design automation. The book is useful for researchers and design automation engineers who wish to understand how the main problems hindering the adoption of high-level synthesis among designers.
  table of contents: to High-Level Synthesis -- Survey of Previous Work -- Models and Representations -- Parallelizing High-Level Synthesis (PHLS) -- Our Parallelizing High-Level Synthesis Methodology -- Pre-Synthesis Compiler Optimizations -- Compiler and Synthesis Transformations Employed During Scheduling -- Code Transformations and Scheduling -- Resource Binding and Control Synthesis -- SPARK: Implementation Scripts and Design Examples -- SPARK: Implementation, Usage and Synthesis Scripts -- Design Examples -- Case Study: Synthesis of an Instruction Length Decoder -- Future Directions -- Conclusions and Future Work.
  note: by Sumit Gupta, Rajesh K. Gupta, Nikil D. Dutt, Alexandru Nicolau.
  subject:
    topic: Engineering
  subject:
    topic: Electrical engineering
  subject:
    topic: Electronic circuits
  subject:
    topic: Engineering
  subject:
    topic: Circuits and Systems
  subject:
    topic: Electrical Engineering
  classification: TK7888.4
  classification: 621.3815
  related item:
    title info:
      title: Springer eBooks
  identifier: 9781402078385
  identifier: http://dx.doi.org/10.1007/b117058
  record info:
    record creation date: 100301
    record change date: 20151204154617.0
    record identifier: 978-1-4020-7838-5