rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Quantifying and Exploring the Gap Between FPGAs and ASICs
    sub title: Measuring and Exploring
  name:
    name part: Kuon, Ian.
    role:
      role term: creator
    role:
      role term: author.
  name:
    name part: Rose, Jonathan.
    role:
      role term: author.
  name:
    name part: SpringerLink (Online service)
  type of resource: text
  origin info:
    place:
      place term: xxu
    date issued: 2010
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: electronic
    form: electronic resource
    reformatting quality: access
    form: remote
    extent: XI, 180 p. online resource.
  abstract: Field-Programmable Gate Arrays (FPGAs) have become the dominant digital implementation medium as measured by design starts. They are preferred because designers can avoid the pitfalls of nanoelectronic design and because the designer can change the design up until the last minute. However, it has always been understood that FPGAs use more area, are slower, and consume far more power than the alternative: Application-Specific ICs built from standard cells. But how much? Quantifying and Exploring the Gap Between FPGAs and ASICs is the first book to explore exactly what that difference is, to enable system designers to make better in-formed choices between these two media and to give insight to FPGA makers on the deficiencies to attack and thereby improve FPGAs. The gap is a very nuanced thing, though: it strongly depends on the nature of the circuit being implemented, in sometimes counterintuitive ways. The book presents a careful exploration of these issues in its first half. The second half of the book looks at ways that creators and users of FPGAs can close the gap between FPGAs and ASICs. It presents the most sweeping exploration of FPGA architecture and circuit design ever performed. The authors show that, with careful use of transistor-level design, combined with good choices of the soft-logic architecture, that a wide spectrum of FPGA devices can be used to narrow specific selected gaps in area, speed and power.
  table of contents: Background -- Measuring the Gap -- Automated Transistor Sizing for FPGAs -- Navigating the Gap Using Architecture and Process Technology Scaling -- Navigating the Gap using Transistor Sizing -- Conclusions and FutureWork.
  note: by Ian Kuon, Jonathan Rose.
  subject:
    topic: Engineering
  subject:
    topic: Computer hardware
  subject:
    topic: Computer-aided engineering
  subject:
    topic: Electronics
  subject:
    topic: Microelectronics
  subject:
    topic: Electronic circuits
  subject:
    topic: Engineering
  subject:
    topic: Circuits and Systems
  subject:
    topic: Computer-Aided Engineering (CAD, CAE) and Design
  subject:
    topic: Computer Hardware
  subject:
    topic: Electronics and Microelectronics, Instrumentation
  classification: TK7888.4
  classification: 621.3815
  related item:
    title info:
      title: Springer eBooks
  identifier: 9781441907394
  identifier: http://dx.doi.org/10.1007/978-1-4419-0739-4
  record info:
    record creation date: 100701
    record change date: 20151204165309.0
    record identifier: 978-1-4419-0739-4