http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
Low-Power Computation for Social Innovation
VII, 213 p. 182 illus., 69 illus. in color. online resource.
This book describes computing innovation, using non-volatile memory for a sustainable world. It provides a compact overview of a green computing scheme, including cutting-edge CMOS low-power devices, comprehensive spintronics knowledge, trends in low-volatile memory and non-volatile RAM, low voltage (low leakage) computing circuits and systems, and a low-power computing plan that uses non-volatile memory. Coverage should appeal both to computing engineers and device engineers, as the authors describe a new means of lower power computing innovation, without sacrificing performance over conventional low-voltage operation. Readers will be introduced to methods of design and implementation for non-volatile memory which allow computing equipment to be turned off normally when not in use and to be turned on instantly to operate with full performance when needed. · Provides a comprehensive introduction to current low-power innovation, low-voltage technology and non-volatile memory technology; · Includes an overview of leading-edge CMOS low-power devices and spintronics technology; · Describes trends in low-voltage SRAM and low-voltage DRAM, providing readers with power management insight, showing the evolution of the interface between memory and processor and the predicted development of memory hierarchy systems in the future; · Describes in detail STT-RAM (or SPRAM, spin-transfer torque RAM) technology and its potential for achieving low power consumption and high performance; · Covers low-power computing technology at the circuits and systems levels, including the latest low-voltage computing technology being used to prevent leakage currents, as well as a description of an instantaneous on/off system using non-volatile RAMs, which can serve as an example for future green computing.
Introduction.- Low-Power Electron Devices -- Low-Power Spin Devices -- Low-Power SRAM.- Low-Power DRAM -- Low-Power NV-RAM -- On-Chip Power Gating Technique -- Low-Power Processing with NV-RAM -- Closing.
edited by Takayuki Kawahara, Hiroyuki Mizuno.
Electronics and Microelectronics, Instrumentation