http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
15th IFIP WG 10.3 International Conference, NPC 2018, Muroran, Japan, November 29 - December 1, 2018, Proceedings
XII, 192 p. 115 illus., 73 illus. in color. online resource.
This book constitutes the proceedings of the 15th IFIP International Conference on Network and Parallel Computing, NPC 2018, held in Muroran, Japan, in November/December 2018. The 22 full and 12 short papers presented in this volume were carefully reviewed and selected from 72 submissions. The papers cover traditional areas of network and parallel computing, including parallel applications, distributed algorithms, parallel architectures, software environments, and distributed tools.
CNLoc: Channel State Information Assisted Indoor WLAN Localization Using Nomadic Access Points -- ALOR: Adaptive Layout Optimization of Raft Groups for Heterogeneous Distributed Key-Value Stores -- STrieGD: A Sampling Trie Indexed Compression Algorithm for Large-Scale Gene Data -- On Retargeting the AI Programming Framework to New Hardwares -- An Efficient Method For Determining Full Point-to-point Latency Of Arbitrary Indirect HPC Networks -- KT-Store: A Key-Order and Write-Order Hybrid Key-Value Store with High Write and Range-query Performance -- GRAM: A GPU-based Property Graph Traversal and Query for HPC Rich Metadata Management -- GPU-Accelerated Clique Tree Propagation for Pouch Latent Tree Models -- HPC-SFI: System-level Fault Injection for High Performance Computing Systems -- Data Fine-pruning: A Simple Way to Accelerate Neural Network Training -- Balancing the QOS and Security in Dijkstra Algorithm by SDN Technology -- Labeled Network Stack: A Co-Designed Stack for Low Tail-Latency and High Concurrency in Datacenter Services -- A Deep Learning Approach for Network Anomaly Detection based on AMF-LSTM -- FSObserver: A Performance Measurement and Monitoring Tool for Distributed Storage Systems -- vGrouper: Optimizing the Performance of Parallel Jobs in Xen by Increasing Synchronous Execution of Virtual Machines -- Systolic Array Based Accelerator and Algorithm Mapping for Deep Learning Algorithms -- A Fine-grained Performance Bottleneck Analysis Method for HDFS -- Mimir+ : An Optimized Framework of MapReduce on Heterogeneous High-Performance Computing System -- DLIR: An Intermediate Representation for Deep Learning Processors -- GPU Memory Management Solution Supporting Incomplete Pages -- Leveraging Subgraph Extraction for Performance Portable Programming Frameworks on DL Accelerators -- An Intelligent Parking Scheduling Algorithm based on Traffic and Driver Behavior Predictions. .
edited by Feng Zhang, Jidong Zhai, Marc Snir, Hai Jin, Hironori Kasahara, Mateo Valero.
Computer Systems Organization and Communication Networks
Computer Imaging, Vision, Pattern Recognition and Graphics
Theoretical Computer Science and General Issues ; 11276