rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Noise-Shaping All-Digital Phase-Locked Loops
    sub title: Modeling, Simulation, Analysis and Design
  name:
    name part: Brandonisio, Francesco.
    role:
      role term: creator
    role:
      role term: author.
  name:
    name part: Kennedy, Michael Peter.
    role:
      role term: author.
  name:
    name part: SpringerLink (Online service)
  type of resource: text
  origin info:
    place:
      place term: gw
    date issued: 2014
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: electronic
    form: electronic resource
    reformatting quality: access
    form: remote
    extent: XIII, 177 p. 145 illus., 79 illus. in color. online resource.
  abstract: This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book. • Discusses in detail a wide range of all-digital phase-locked loops architectures; • Presents a unified framework in which to model time-to-digital converters for ADPLLs; • Explains a procedure to predict and simulate phase noise in oscillators and ADPLLs; • Describes an efficient approach to model ADPLLS; • Includes Matlab code to reproduce the examples in the book.
  table of contents: Introduction -- Phase Digitization in All-Digital PLLs -- A Unifying Framework for TDC Architectures -- Analytical Predictions of Phase Noise in ADPLLs -- Advantages of Noise Shaping and Dither -- Efficient Modeling and Simulation of Accumulator-Based ADPLLs -- Modelling and Estimating Phase Noise with Matlab.
  note: by Francesco Brandonisio, Michael Peter Kennedy.
  subject:
    topic: Engineering
  subject:
    topic: Electronics
  subject:
    topic: Microelectronics
  subject:
    topic: Electronic circuits
  subject:
    topic: Engineering
  subject:
    topic: Circuits and Systems
  subject:
    topic: Signal, Image and Speech Processing
  subject:
    topic: Electronics and Microelectronics, Instrumentation
  classification: TK7888.4
  classification: 621.3815
  related item:
    title info:
      title: Springer eBooks
  related item:
    title info:
      title: Analog Circuits and Signal Processing
  identifier: 9783319036595
  identifier: http://dx.doi.org/10.1007/978-3-319-03659-5
  record info:
    record creation date: 131217
    record change date: 20151030031021.0
    record identifier: 978-3-319-03659-5