rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Formal Techniques, Modelling and Analysis of Timed and Fault-Tolerant Systems
    sub title: Joint International Conferences on Formal Modeling and Analysis of Timed Systems, FORMATS 2004 and Formal Techniques in Real Time and Fault-Tolerant Systems, FTRTFT 2004, Grenoble, France, September 22-24, 2004, Proceedings
  name:
    name part: Lakhnech, Yassine.
    role:
      role term: editor.
    role:
      role term: edt
    role:
      role term: http://id.loc.gov/vocabulary/relators/edt
  name:
    name part: Yovine, Sergio.
    role:
      role term: editor.
    role:
      role term: edt
    role:
      role term: http://id.loc.gov/vocabulary/relators/edt
  name:
    name part: SpringerLink (Online service)
  type of resource: text
  origin info:
    place:
      place term: gw
    date issued: 2004
    edition: 1st ed. 2004.
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: electronic
    form: electronic resource
    reformatting quality: access
    form: remote
    extent: X, 402 p. online resource.
  table of contents: Invited Papers -- From Software to Hardware and Back -- Of Elections and Electrons -- Regular Papers -- Formal Verification of an Avionics Sensor Voter Using SCADE -- Mixed Delay and Threshold Voters in Critical Real-Time Systems -- Towards a Methodological Approach to Specification and Analysis of Dependable Automation Systems -- On Two-Sided Approximate Model-Checking: Problem Formulation and Solution via Finite Topologies -- On Timed Automata with Input-Determined Guards -- Decomposing Verification of Timed I/O Automata -- Symbolic Model Checking for Simply-Timed Systems -- Robustness and Implementability of Timed Automata -- Real-Time Testing with Timed Automata Testers and Coverage Criteria -- Monitoring Temporal Properties of Continuous Signals -- A Unified Fault-Tolerance Protocol -- Automating the Addition of Fail-Safe Fault-Tolerance: Beyond Fusion-Closed Specifications -- Modeling and Verification of a Fault-Tolerant Real-Time Startup Protocol Using Calendar Automata -- Static Fault-Tolerant Real-Time Scheduling with "Pseudo-topological" Orders -- The Influence of Durational Actions on Time Equivalences -- Bounded Model Checking for Region Automata -- Some Progress in Satisfiability Checking for Difference Logic -- Model-Checking for Weighted Timed Automata -- Symbolic Model Checking for Probabilistic Timed Automata -- Structured Modeling of Concurrent Stochastic Hybrid Systems -- Computing Schedules for Multithreaded Real-Time Programs Using Geometry -- Forward Reachability Analysis of Timed Petri Nets -- Lazy Approximation for Dense Real-Time Systems -- Learning of Event-Recording Automata.
  note: edited by Yassine Lakhnech, Sergio Yovine.
  subject:
    topic: Computers
  subject:
    topic: Computer logic
  subject:
    topic: Programming languages (Electronic computers)
  subject:
    topic: Microprocessors
  subject:
    topic: Special purpose computers
  subject:
    topic: Software engineering
  subject:
    topic: Theory of Computation
  subject:
    topic: Logics and Meanings of Programs
  subject:
    topic: Programming Languages, Compilers, Interpreters
  subject:
    topic: Processor Architectures
  subject:
    topic: Special Purpose and Application-Based Systems
  subject:
    topic: Software Engineering
  classification: QA75.5-76.95
  classification: QA76.63
  classification: 004.0151
  related item:
    title info:
      title: Springer eBooks
  related item:
    title info:
      title: Lecture Notes in Computer Science, 3253
  identifier: 9783540302063
  identifier: https://doi.org/10.1007/b100824
  record info:
    record creation date: 121227
    record change date: 20191026143250.0
    record identifier: 978-3-540-30206-3