http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
4th International Symposium, ISHPC 2002, Kansai Science City, Japan, May 15-17, 2002. Proceedings
I wish to welcome all of you to the International Symposium on High Perf- mance Computing 2002 (ISHPC2002) and to Kansai Science City, which is not farfromtheancientcapitalsofJapan:NaraandKyoto.ISHPC2002isthefourth in the ISHPC series, which consists, to date, of ISHPC '97 (Fukuoka, November 1997), ISHPC '99 (Kyoto, May 1999), and ISHPC2000 (Tokyo, October 2000). The success of these symposia indicates the importance of this area and the strong interest of the research community. With all of the recent drastic changes in HPC technology trends, HPC has had and will continue to have a signi?cant impact on computer science and technology. I am pleased to serve as General Chair at a time when HPC plays a crucial role in the era of the IT (Information Technology) revolution. The objective of this symposium is to exchange the latest research results in software, architecture, and applications in HPC in a more informal and friendly atmosphere. I am delighted that the symposium is, like past successful ISHPCs, comprised of excellent invited talks, panels, workshops, as well as high-quality technical papers on various aspects of HPC. We hope that the symposium will provide an excellent opportunity for lively exchange and discussion about - rections in HPC technologies and all the participants will enjoy not only the symposium but also their stay in Kansai Science City.
Invited Papers -- The Gilgamesh MIND Processor-in-Memory Architecture for Petaflops-Scale Computing -- The UK e-Science Program and the Grid -- SPEC HPC2002: The Next High-Performance Computer Benchmark -- Award Papers -- Language and Compiler Support for Hybrid-Parallel Programming on SMP Clusters -- Parallelizing Merge Sort onto Distributed Memory Parallel Computers -- Networks -- Avoiding Network Congestion with Local Information -- Improving InfiniBand Routing through Multiple Virtual Networks -- Architectures I -- Minerva: An Adaptive Subblock Coherence Protocol for Improved SMP Performance -- Active Memory Clusters: Efficient Multiprocessing on Commodity Clusters -- The Impact of Alias Analysis on VLIW Scheduling -- Low-Cost Value Predictors Using Frequent Value Locality -- Architectures II -- Integrated I-cache Way Predictor and Branch Target Buffer to Reduce Energy Consumption -- A Comprehensive Analysis of Indirect Branch Prediction -- High Performance and Energy Efficient Serial Prefetch Architecture -- A Programmable Memory Hierarchy for Prefetching Linked Data Structures -- HPC Systems -- Block Red-Black Ordering Method for Parallel Processing of ICCG Solver -- Integrating Performance Analysis in the Uintah Software Development Cycle -- Performance of Adaptive Mesh Refinement Scheme for Hydrodynamics on Simulations of Expanding Supernova Envelope -- Earth Simulator -- An MPI Benchmark Program Library and Its Application to the Earth Simulator -- Parallel Simulation of Seismic Wave Propagation -- Large-Scale Parallel Computing of Cloud Resolving Storm Simulator -- Short Papers -- Routing Mechanism for Static Load Balancing in a Partitioned Computer System with a Fully Connected Network -- Studying New Ways for Improving Adaptive History Length Branch Predictors -- Speculative Clustered Caches for Clustered Processors -- The Effects of Timing Dependence and Recursion on Parallel Program Schemata -- Cache Line Impact on 3D PDE Solvers -- An EPIC Processor with Pending Functional Units -- Software Energy Optimization of Real Time Preemptive Tasks by Minimizing Cache-Related Preemption Costs -- Distributed Genetic Algorithm with Multiple Populations Using Multi-agent -- Numerical Weather Prediction on the Supercomputer Toolkit -- OpenTella: A Peer-to-Peer Protocol for the Load Balancing in a System Formed by a Cluster from Clusters -- Power Estimation of a C Algorithm Based on the Functional-Level Power Analysis of a Digital Signal Processor -- Irregular Assignment Computations on cc-NUMA Multiprocessors -- International Workshop on OpenMP: Experiences and Implementations (WOMPEI 2002) -- Large System Performance of SPEC OMP2001 Benchmarks -- A Shared Memory Benchmark in OpenMP -- Performance Evaluation of the Hitachi SR8000 Using OpenMP Benchmarks -- Communication Bandwidth of Parallel Programming Models on Hybrid Architectures -- Performance Comparisons of Basic OpenMP Constructs -- SPMD OpenMP versus MPI on a IBM SMP for 3 Kernels of the NAS Benchmarks -- Parallel Iterative Solvers for Unstructured Grids Using an OpenMP/MPI Hybrid Programming Model for the GeoFEM Platform on SMP Cluster Architectures -- A Parallel Computing Model for the Acceleration of a Finite Element Software -- Towards OpenMP Execution on Software Distributed Shared Memory Systems -- Dual-Level Parallelism Exploitation with OpenMP in Coastal Ocean Circulation Modeling -- Static Coarse Grain Task Scheduling with Cache Optimization Using OpenMP -- HPF International Workshop: Experiences and Progress (HiWEP 2002) -- High Performance Fortran - History, Status and Future -- Performance Evaluation for Japanese HPF Compilers with Special Benchmark Suite -- Evaluation of the HPF/JA Extensions on Fujitsu VPP Using the NAS Parallel Benchmarks -- Three-Dimensional Electromagnetic Particle-in-Cell Code Using High Performance Fortran on PC Cluster -- Towards a Lightweight HPF Compiler -- Parallel I/O Support for HPF on Computational Grids -- Optimization of HPF Programs with Dynamic Recompilation Technique.
edited by Hans P. Zima, Kazuki Joe, Mitsuhisa Sato, Yoshiki Seo, Masaaki Shimasaki.
Software Engineering/Programming and Operating Systems