rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Transactions on High-Performance Embedded Architectures and Compilers I
  name:
    name part: Stenström, Per.
    role:
      role term: editor.
  name:
    name part: SpringerLink (Online service)
  type of resource: text
  origin info:
    place:
      place term: gw
    date issued: 2007
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: electronic
    form: electronic resource
    reformatting quality: access
    form: remote
    extent: XVI, 368 p. online resource.
  table of contents: High Performance Processor Chips -- High Performance Processor Chips -- High-Performance Embedded Architecture and Compilation Roadmap -- 1: First International Conference on High-Performance Embedded Architectures and Compilers, HiPEAC 2005. Best Papers -- to Part 1 -- Quick and Practical Run-Time Evaluation of Multiple Program Optimizations -- Specializing Cache Structures for High Performance and Energy Conservation in Embedded Systems -- GCH: Hints for Triggering Garbage Collections -- Memory-Centric Security Architecture -- Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems -- 2: Optimizing Compilers -- to Part 2 -- Convergent Compilation Applied to Loop Unrolling -- Finding and Applying Loop Transformations for Generating Optimized FPGA Implementations -- Dynamic and On-Line Design Space Exploration for Reconfigurable Architectures -- Automatic Discovery of Coarse-Grained Parallelism in Media Applications -- An Approach for Enhancing Inter-processor Data Locality on Chip Multiprocessors -- 3: ACM International Conference on Computing Frontiers 2006. Best Papers -- to Part 3 -- Hardware/Software Architecture for Real-Time ECG Monitoring and Analysis Leveraging MPSoC Technology -- Using Application Bisection Bandwidth to Guide Tile Size Selection for the Synchroscalar Tile-Based Architecture -- Static Cache Partitioning Robustness Analysis for Embedded On-Chip Multi-processors -- Selective Code Compression Scheme for Embedded Systems -- A Prefetching Algorithm for Multi-speed Disks -- Reconfiguration Strategies for Environmentally Powered Devices: Theoretical Analysis and Experimental Validation.
  note: edited by Per Stenström.
  subject:
    topic: Computer science
  subject:
    topic: Arithmetic and logic units, Computer
  subject:
    topic: Input-output equipment (Computers)
  subject:
    topic: Logic design
  subject:
    topic: Microprocessors
  subject:
    topic: Computer communication systems
  subject:
    topic: Computers
  subject:
    topic: Computer Science
  subject:
    topic: Theory of Computation
  subject:
    topic: Arithmetic and Logic Structures
  subject:
    topic: Processor Architectures
  subject:
    topic: Input/Output and Data Communications
  subject:
    topic: Logic Design
  subject:
    topic: Computer Communication Networks
  classification: QA75.5-76.95
  classification: 004.0151
  related item:
    title info:
      title: Springer eBooks
  related item:
    title info:
      title: Lecture Notes in Computer Science, 4050
  identifier: 9783540715283
  identifier: http://dx.doi.org/10.1007/978-3-540-71528-3
  record info:
    record creation date: 100301
    record change date: 20170118225037.0
    record identifier: 978-3-540-71528-3