rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: High Performance Embedded Architectures and Compilers
    sub title: 5th International Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010. Proceedings
  name:
    name part: Patt, Yale N.
    role:
      role term: editor.
  name:
    name part: Foglia, Pierfrancesco.
    role:
      role term: editor.
  name:
    name part: Duesterwald, Evelyn.
    role:
      role term: editor.
  name:
    name part: Faraboschi, Paolo.
    role:
      role term: editor.
  name:
    name part: Martorell, Xavier.
    role:
      role term: editor.
  name:
    name part: SpringerLink (Online service)
  type of resource: text
  origin info:
    place:
      place term: gw
    date issued: 2010
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: electronic
    form: electronic resource
    reformatting quality: access
    form: remote
    extent: XIII, 370 p. online resource.
  abstract: This book constitutes the refereed proceedings of the 5th International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2010, held in Pisa, Italy, in January 2010. The 23 revised full papers presented together with the abstracts of 2 invited keynote addresses were carefully reviewed and selected from 94 submissions. The papers are organized in topical sections on architectural support for concurrency; compilation and runtime systems; reconfigurable and customized architectures; multicore efficiency, reliability, and power; memory organization and optimization; and programming and analysis of accelerators.
  table of contents: Invited Program -- Embedded Systems as Datacenters -- Larrabee: A Many-Core Intel Architecture for Visual Computing -- Architectural Support for Concurrency -- Remote Store Programming -- Low-Overhead, High-Speed Multi-core Barrier Synchronization -- Improving Performance by Reducing Aborts in Hardware Transactional Memory -- Energy and Throughput Efficient Transactional Memory for Embedded Multicore Systems -- Compilation and Runtime Systems -- Split Register Allocation: Linear Complexity Without the Performance Penalty -- Trace-Based Data Layout Optimizations for Multi-core Processors -- Buffer Sizing for Self-timed Stream Programs on Heterogeneous Distributed Memory Multiprocessors -- Automatically Tuning Sparse Matrix-Vector Multiplication for GPU Architectures -- Reconfigurable and Customized Architectures -- Virtual Ways: Efficient Coherence for Architecturally Visible Storage in Automatic Instruction Set Extensions -- Accelerating XML Query Matching through Custom Stack Generation on FPGAs -- An Application-Aware Load Balancing Strategy for Network Processors -- Memory-Aware Application Mapping on Coarse-Grained Reconfigurable Arrays -- Multicore Efficiency, Reliability, and Power -- Maestro: Orchestrating Lifetime Reliability in Chip Multiprocessors -- Combining Locality Analysis with Online Proactive Job Co-scheduling in Chip Multiprocessors -- RELOCATE: Register File Local Access Pattern Redistribution Mechanism for Power and Thermal Management in Out-of-Order Embedded Processor -- Performance and Power Aware CMP Thread Allocation Modeling -- Memory Organization and Optimization -- Multi-level Hardware Prefetching Using Low Complexity Delta Correlating Prediction Tables with Partial Matching -- Scalable Shared-Cache Management by Containing Thrashing Workloads -- SRP: Symbiotic Resource Partitioning of the Memory Hierarchy in CMPs -- DIEF: An Accurate Interference Feedback Mechanism for Chip Multiprocessor Memory Systems -- Programming and Analysis of Acce…
  note: edited by Yale N. Patt, Pierfrancesco Foglia, Evelyn Duesterwald, Paolo Faraboschi, Xavier Martorell.
  subject:
    topic: Computer science
  subject:
    topic: Arithmetic and logic units, Computer
  subject:
    topic: Input-output equipment (Computers)
  subject:
    topic: Logic design
  subject:
    topic: Microprocessors
  subject:
    topic: Computer communication systems
  subject:
    topic: Computer programming
  subject:
    topic: Computer Science
  subject:
    topic: Programming Techniques
  subject:
    topic: Arithmetic and Logic Structures
  subject:
    topic: Processor Architectures
  subject:
    topic: Input/Output and Data Communications
  subject:
    topic: Logic Design
  subject:
    topic: Computer Communication Networks
  classification: QA76.6-76.66
  classification: 005.11
  related item:
    title info:
      title: Springer eBooks
  related item:
    title info:
      title: Lecture Notes in Computer Science, 5952
  identifier: 9783642115158
  identifier: http://dx.doi.org/10.1007/978-3-642-11515-8
  record info:
    record creation date: 100301
    record change date: 20151204161421.0
    record identifier: 978-3-642-11515-8