http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
XIX, 108 p. 111 illus., 5 illus. in color. online resource.
This book describes the design of a receiver front-end circuit for operation in the 60GHz range in 90nm CMOS. Physical layout of the test circuit and post-layout simulations for the implementation of a test chip including the QVCO and the first stage divider are also presented. The content of this book is particularly of interest to those working on mm-wave frequency generation and signal reception.
Introduction -- Background -- Design and Simulation Results -- Top-Level Design -- Layout and Post-Layout Simulations -- Perspectives -- Transformer-Coupled Buffer.
by Khaled Khalaf, Vojkan Vidojkovic, Piet Wambacq, John R. Long.
Power Electronics, Electrical Machines and Networks
Computer Systems Organization and Communication Networks
Lecture Notes in Electrical Engineering, 346