rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Dynamic Reconfigurable Architectures and Transparent Optimization Techniques
    sub title: Automatic Acceleration of Software Execution
  name:
    name part: Schneider Beck Fl., Antonio Carlos.
    role:
      role term: creator
    role:
      role term: author.
  name:
    name part: Carro, Luigi.
    role:
      role term: author.
  name:
    name part: SpringerLink (Online service)
  type of resource: text
  origin info:
    place:
      place term: ne
    date issued: 2010
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: electronic
    form: electronic resource
    reformatting quality: access
    form: remote
    extent: XVII, 177 p. online resource.
  abstract: As Moore’s law is losing steam, one already sees the phenomenon of clock frequency reduction caused by the excessive power dissipation in general purpose processors. At the same time, embedded systems are concentrating several heterogeneous applications in a single device, and hence new architectural alternatives are necessary. Reconfigurable computing has already shown to be a potential solution when it comes to accelerate specific code with a small power budget, but significant speedups are achieved only in very dedicated dataflow oriented software, without capturing the reality of nowadays complex heterogeneous systems. Moreover, any architecture solution should be able to execute legacy code, since there is already a large base of applications and standards. Dynamic Reconfigurable Architectures and Transparent Optimization Techniques presents a detailed study on new techniques to cope with the aforementioned limitations. First, characteristics of reconfigurable systems are discussed in details, and a large number of case studies is shown. Then, a detailed analysis of several benchmarks demonstrates that such architectures need to attack a diverse range of applications with very different behaviours, besides supporting code compatibility. This requires the use of dynamic optimization techniques, such as Binary Translation and Trace reuse. Finally, works that combine both reconfigurable systems and dynamic techniques are discussed and a quantitative analysis of one them, the DIM architecture, is presented.
  table of contents: Reconfigurable Systems -- Deployment of Reconfigurable Systems -- Dynamic Optimization Techniques -- Dynamic Detection and Reconfiguration -- The DIM Reconfigurable System -- Conclusions and Future Trends.
  note: by Antonio Carlos Schneider Beck Fl., Luigi Carro.
  subject:
    topic: Engineering
  subject:
    topic: Microprocessors
  subject:
    topic: Electronic circuits
  subject:
    topic: Engineering
  subject:
    topic: Circuits and Systems
  subject:
    topic: Processor Architectures
  classification: TK7888.4
  classification: 621.3815
  related item:
    title info:
      title: Springer eBooks
  identifier: 9789048139132
  identifier: http://dx.doi.org/10.1007/978-90-481-3913-2
  record info:
    record creation date: 100316
    record change date: 20151125192608.0
    record identifier: 978-90-481-3913-2