rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Stochastic Process Variation in Deep-Submicron CMOS
    sub title: Circuits and Algorithms
  name:
    name part: Zjajo, Amir.
    role:
      role term: creator
    role:
      role term: author.
  name:
    name part: SpringerLink (Online service)
  type of resource: text
  origin info:
    place:
      place term: ne
    date issued: 2014
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: electronic
    form: electronic resource
    reformatting quality: access
    form: remote
    extent: XIX, 192 p. 46 illus. online resource.
  abstract: One of the most notable features of nanometer scale CMOS technology is the increasing magnitude of variability of the key device parameters affecting performance of integrated circuits. The growth of variability can be attributed to multiple factors, including the difficulty of manufacturing control, the emergence of new systematic variation-generating mechanisms, and most importantly, the increase in atomic-scale randomness, where device operation must be described as a stochastic process. In addition to wide-sense stationary stochastic device variability and temperature variation, existence of non-stationary stochastic electrical noise associated with fundamental processes in integrated-circuit devices represents an elementary limit on the performance of electronic circuits. In an attempt to address these issues, Stochastic Process Variation in Deep-Submicron CMOS: Circuits and Algorithms offers unique combination of mathematical treatment of random process variation, electrical noise and temperature and necessary circuit realizations for on-chip monitoring and performance calibration. The associated problems are addressed at various abstraction levels, i.e. circuit level, architecture level and system level. It therefore provides a broad view on the various solutions that have to be used and their possible combination in very effective complementary techniques for both analog/mixed-signal and digital circuits. The feasibility of the described algorithms and built-in circuitry has been verified by measurements from the silicon prototypes fabricated in standard 90 nm and 65 nm CMOS technology. .
  table of contents: 1 Introduction -- 2 Random Process Variation in Deep-Submicron CMOS -- 3 Electronic Noise in Deep-Submicron CMOS -- 4 Thermal Effects in Deep-Submicron CMOS -- 5 Circuit Solutions -- 6 Conclusions and Recommendations -- Appendix. References -- Acknowledgement -- About the Author.
  note: by Amir Zjajo.
  subject:
    topic: Physics
  subject:
    topic: Biomathematics
  subject:
    topic: Electronic circuits
  subject:
    topic: Statistical physics
  subject:
    topic: Dynamical systems
  subject:
    topic: Applied mathematics
  subject:
    topic: Engineering mathematics
  subject:
    topic: Physics
  subject:
    topic: Electronic Circuits and Devices
  subject:
    topic: Circuits and Systems
  subject:
    topic: Statistical Physics, Dynamical Systems and Complexity
  subject:
    topic: Appl.Mathematics/Computational Methods of Engineering
  subject:
    topic: Physiological, Cellular and Medical Topics
  classification: TK7867-7867.5
  classification: 621.3815
  related item:
    title info:
      title: Springer eBooks
  related item:
    title info:
      title: Springer Series in Advanced Microelectronics, 48
  identifier: 9789400777811
  identifier: http://dx.doi.org/10.1007/978-94-007-7781-1
  record info:
    record creation date: 131113
    record change date: 20151204184543.0
    record identifier: 978-94-007-7781-1