rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: ESD
    sub title: analog circuits and design
  name:
    name part: Voldman, Steven H.
    role:
      role term: creator
  type of resource: text
  genre: bibliography
  genre: Electronic books.
  origin info:
    place:
      place term: enk
    date issued: 2014
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: remote
    extent: 1 online resource.
  abstract: This book is about analog circuit design layout and schematic development, architecture of chips, and ESD design. Two critical design aspects for analog and power integrated circuits are combined. A comprehensive list of practical application examples is used to demonstrate the combination of both techniques and any potential design trade-offs. Features: describes analog design fundamentals (circuit fundamentals) as well as outlining the various ESD implications; covers a large breadth of subjects and technologies, such as CMOS, LDMOS, binary coded decimal, SOI, and thick body SOI; establishes an "ESD analog design" discipline that distinguishes itself from the alternative ESD digital design focus; focuses on circuit and circuit design applications. --
  table of contents: ESD Series; Title page; Copyright page; Dedication; About the Author; Preface; Acknowledgments; 1 Analog, ESD, and EOS; 1.1 ESD in Analog Design; 1.2 Analog Design Discipline and ESD Circuit Techniques; 1.3 Design Symmetry and ESD; 1.4 ESD Design Synthesis and Architecture Flow; 1.5 ESD Design and Noise; 1.6 ESD Design Concepts: Adjacency; 1.7 Electrical Overstress; 1.8 Reliability Technology Scaling and the Reliability Bathtub Curve; 1.9 Safe Operating Area; 1.10 Closing Comments and Summary; References; 2 Analog Design Layout; 2.1 Analog Design Layout Revisited; 2.2 Common Centroid Design
  table of contents: 2.3 Interdigitation Design2.4 Common Centroid and Interdigitation Design; 2.5 Passive Element Design; 2.6 Resistor Element Design; 2.7 Capacitor Element Design; 2.8 Inductor Element Design; 2.9 Diode Design; 2.10 MOSFET Design; 2.11 Bipolar Transistor Design; 2.12 Closing Comments and Summary; References; 3 Analog Design Circuits; 3.1 Analog Circuits; 3.2 Single-Ended Receivers; 3.3 Differential Receivers; 3.4 Comparators; 3.5 Current Sources; 3.6 Current Mirrors; 3.7 Voltage Regulators; 3.8 Voltage Reference Circuits; 3.9 Converters; 3.10 Oscillators; 3.11 Phase Lock Loop
  table of contents: 3.12 Delay Locked Loop3.13 Closing Comments and Summary; References; 4 Analog ESD Circuits; 4.1 Analog ESD Devices and Circuits; 4.2 ESD Diodes; 4.3 ESD MOSFET Circuits; 4.4 ESD Silicon-Controlled Rectifier Circuits; 4.5 Laterally Diffused MOS Circuits; 4.6 DeMOS Circuits; 4.7 Ultrahigh-Voltage LDMOS Circuits; 4.8 Closing Comments and Summary; References; 5 Analog and ESD Design Synthesis; 5.1 Early ESD Failures in Analog Design; 5.2 Mixed-Voltage Interface: Voltage Regulator Failures; 5.3 Separation of Analog Power from Digital Power AVDD to DVDD
  table of contents: 5.4 ESD Failure in Phase Lock Loop (PLL) and System Clock5.5 ESD Failure in Current Mirrors; 5.6 ESD Failure in Schmitt Trigger Receivers; 5.7 Isolated Digital and Analog Domains; 5.8 ESD Protection Solution: Connectivity of AVDD to VDD; 5.9 Connectivity of AVSS to DVSS; 5.10 Digital and Analog Domain with ESD Power Clamps; 5.11 Digital and Analog Domain with Master/Slave ESD Power Clamps; 5.12 High-Voltage, Digital, and Analog Domain Floor Plan; 5.13 Closing Comments and Summary; References; 6 Analog-to-Digital ESD Design Synthesis; 6.1 Digital and Analog
  table of contents: 6.2 Interdomain Signal Line ESD Failures6.3 Digital-to-Analog Core Spatial Isolation; 6.4 Digital-to-Analog Core Ground Coupling; 6.5 Domain-to-Domain Signal Line ESD Networks; 6.6 Domain-to-Domain Third-Party Coupling Networks; 6.7 Domain-to-Domain Cross-Domain ESD Power Clamp; 6.8 Digital-to-Analog Domain Moat; 6.9 Digital-to-Analog Domain Moat with Through-Silicon Via; 6.10 Domain-to-Domain ESD Design Rule Check and Verification Methods; 6.11 Closing Comments and Summary; References; 7 Analog-ESD Signal Pin Co-synthesis; 7.1 Analog Signal Pin; 7.2 Analog Signal Differential Receiver
  note: Steven H Voldman.
  note: Includes bibliographical references and index.
  subject:
    topic: Semiconductors
    topic: Protection
  subject:
    topic: Analog integrated circuits
    topic: Protection
  subject:
    topic: Analog integrated circuits
    topic: Design and construction
  subject:
    topic: Electrostatics
  subject:
    topic: Static eliminators
  subject:
    topic: TECHNOLOGY & ENGINEERING
    topic: Mechanical
  subject:
    topic: Analog integrated circuits -- Design and construction
  subject:
    topic: Analog integrated circuits -- Protection
  subject:
    topic: Electrostatics
  subject:
    topic: Semiconductors -- Protection
  subject:
    topic: Static eliminators
  classification: TK7871.85
  classification: 621.3815/3
  related item:
    title info:
      title: ESD
    name:
      name part: Voldman, Steven H.
    origin info:
      publisher: Chichester, West Sussex : John Wiley & Sons Ltd., [2015]
    identifier: (DLC) 2014014598
  related item:
    title info:
      title: ESD series
  identifier: 9781118701478
  identifier: 111870147X
  identifier: 9781118701683
  identifier: 1118701682
  identifier: 9781322024424
  identifier: 1322024421
  identifier: 9781118701409
  identifier: 1118701402
  identifier: 9781119965183
  identifier: 1119965187
  identifier: 2014021528
  identifier: EB00592613 Recorded Books
  identifier: https://doi.org/10.1002/9781118701409
  record info:
    record content source: DLC
    record creation date: 140530
    record change date: 20170124071158.5
    record identifier: ocn880831298
    language of cataloging:
      language term: eng