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|a Bergeron, Janick
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|a Verification methodology manual for system verilog /
|c Bergeron, Janick ... [et al.].
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|a New York :
|b Springer,
|c c 2006
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|a xvii. , 503 σ. :
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|a Περιλαμβάνει βιβλιογραφίες και ευρετήριο.
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|a VERILOG (COMPUTER HARDWARE DESCRIPTION LANGUAGE)
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|a INTERGRATED CIRCUITS--VERIFICATION
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