|
|
|
|
| LEADER |
01290nam a2200265 a 4500 |
| 001 |
GR-Antirio735 |
| 008 |
090506s2006 gr 000 0 gre d |
| 020 |
|
|
|a 0534466028
|
| 040 |
|
|
|a GrPaTEI
|b gre
|c GR-PaULI
|
| 040 |
|
|
|a GrPaTEI
|b gre
|c GR-PaULI
|
| 040 |
|
|
|a GrPaTEI
|b gre
|c GR-PaULI
|
| 082 |
|
0 |
|a 621.381
|2 21
|
| 100 |
0 |
|
|a Lee, Sunggu
|
| 245 |
1 |
0 |
|a Advanced digital logic design :
|b using VHDL , State machines , and synthesis for FPGAs /
|c Lee, Sunggu.
|
| 260 |
|
|
|a Australia , Canada :
|b Thomson,
|c c 2006
|
| 300 |
|
|
|a xii. , 488 σ. :
|b εικ. ;
|c 25 εκ.
|
| 500 |
|
|
|a Περιλαμβάνει ευρετήριο.
|
| 650 |
|
0 |
|a DIGITAL TECHNIQUES
|
| 650 |
|
0 |
|a VERILOG (COMPUTER HARDWARE DESCRIPTION LANGUAGE)
|
| 650 |
|
0 |
|a VHDL (Computer hardware description language)
|
| 942 |
|
|
|2 ddc
|
| 952 |
|
|
|0 0
|1 0
|2 ddc
|4 0
|6 621_381000000000000_LEE
|7 0
|9 262108
|a LISK-2
|b LISK-2
|c BSC
|d 2021-01-17
|e 24
|f 0
|g 0.00
|l 0
|o 621.381 LEE
|p 2430000007133
|r 2021-01-17 00:00:00
|t 1
|w 2021-01-17
|y BK15
|x 20090506 0 1
|x GrPaTEI - Antirrio
|
| 952 |
|
|
|0 0
|1 0
|2 ddc
|4 0
|6 621_381000000000000_LEE
|7 0
|9 262109
|a LISK-2
|b LISK-2
|c BSC
|d 2021-01-17
|e 24
|f 0
|g 0.00
|l 0
|o 621.381 LEE
|p 2430000007134
|r 2021-01-17 00:00:00
|t 1
|w 2021-01-17
|y BK15
|x 20090506 0 1
|x GrPaTEI - Antirrio
|
| 971 |
|
|
|a .b25705349
|b 01-10-20
|c 12-09-16
|
| 999 |
|
|
|c 151173
|d 151173
|
