Digital design : a systems approach /

"This introductory textbook provides students with a system-level perspective and the tools they need to understand, analyze and design digital systems. Going beyond the design of simple combinational and sequential modules, it shows how such modules are used to build complete systems, reflecti...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Κύριος συγγραφέας: Dally, William J. (συγγραφέας.)
Άλλοι συγγραφείς: Harting, R. Curtis (συγγραφέας.)
Μορφή: Βιβλίο
Γλώσσα:English
Έκδοση: Cambridge : Cambridge University Press, 2012.
Θέματα:
LEADER 03716cam a2200277 i 4500
001 17324821
003 GR-PaULI
005 20240529123938.0
008 120530s2012 enka b 001 0 eng
010 |a  2012021831 
020 |a 9780521199506  
040 |a DLC  |b gre  |c DLC  |e AACR2  |d DLC 
082 0 0 |a 621.391  |2 23 
100 |a Dally, William J.  |9 114709  |e συγγραφέας. 
245 1 0 |a Digital design :  |b a systems approach /  |c Willam J. Dally, R. Curtis Harting, Stanford University. 
260 |a Cambridge :   |b Cambridge University Press,   |c 2012. 
300 |a xix, 614 σ. :  |b εικ. ;  |c 26 εκ. 
504 |a Περιλαμβάνει βιβλιογραφικές παραπομπές και ευρετήριο. 
505 8 |a Machine generated contents note: 1. The digital abstraction; 2. The practice of digital system design; 3. Boolean algebra; 4. CMOS logic circuits; 5. Delay and power of CMOS circuits; 6. Combinational logic design; 7. Verilog descriptions of combinational logic; 8. Combinational building blocks; 9. Combinational examples; 10. Arithmetic circuits; 11. Fixed- and floating-point numbers; 12. Fast arithmetic circuits; 13. Arithmetic examples; 14. Sequential logic; 15. Timing constraints; 16. Data path sequential logic; 17. Factoring finite state machines; 18. Microcode; 19. Sequential examples; 20. System-level design; 21. Interface and system-level timing; 22. Pipelines; 23. Interconnect; 24. Memory systems; 25. Asynchronous sequential circuits; 26. Flip flops; 27. Metastability and synchronization failure; 28. Synchronizer design; Appendix: Verilog coding style. 
520 |a "This introductory textbook provides students with a system-level perspective and the tools they need to understand, analyze and design digital systems. Going beyond the design of simple combinational and sequential modules, it shows how such modules are used to build complete systems, reflecting real-world digital design. All the essential topics are covered, including design and analysis of combinational and sequential modules, as well as system timing and synchronization. It also teaches how to write Verilog HDL in a productive and maintainable style that enables CAD tools to do much of the tedious work. A complete introduction to digital design is given through clear explanations, extensive examples and online Verilog files. The teaching package is completed with lecture slides, labs and a solutions manual for instructors. Assuming no previous digital knowledge, this textbook is ideal for undergraduate digital design courses that will prepare students for modern digital practice"-- 
520 |a "This book is intended to teach an undergraduate student to understand and design digital systems. It teaches the skills needed for current industrial digital system design using a hardware description language (Verilog) and modern CAD tools. Particular attention is paid to systemlevel issues including factoring and partitioning digital systems, interface design, and interface timing. Topics needed for a deep understanding of digital circuits, such as timing analysis, metastability, and synchronization, are also covered. Of course, we cover the manual design of combinational and sequential logic circuits. However, we do not dwell on these topics because there is far more to digital system design than designing such simple modules"-- 
650 4 |a Ψηφιακά ηλεκτρονικά  |9 1694 
700 |a Harting, R. Curtis  |9 161034  |e συγγραφέας. 
942 |2 ddc  |c BK 
952 |0 0  |1 0  |2 ddc  |4 0  |6 621_391000000000000_DAL  |7 0  |9 380677  |a LISP  |b LISP  |c BSC  |d 2024-05-29  |i 366028  |l 0  |o 621.391 DAL  |p 025000311303  |r 2024-05-29 00:00:00  |t 1  |w 2024-05-29  |y BK15 
999 |c 221223  |d 221223