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LEADER |
01088nom a2200301 u 4500 |
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10071015 |
003 |
upatras |
005 |
20210117201634.0 |
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090513s2005 eng |
020 |
|
|
|a 9781402080630
|
040 |
|
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|a GR-PaULI
|c GR-PaULI
|
041 |
0 |
|
|a eng
|
100 |
1 |
|
|a Gopalakrishnan, Prakash
|9 67889
|
245 |
1 |
0 |
|a Direct Transistor-level Layout for Digital Blocks
|h [electronic resource]
|c by Prakash Gopalakrishnan, Rob A. Rutenbar
|
260 |
|
|
|a Boston, MA
|b Springer Science + Business Media, Inc.
|c 2005
|
300 |
|
|
|b v.: digital
|
650 |
|
4 |
|a Engineering
|9 17712
|
650 |
|
4 |
|a Computer engineering
|9 24296
|
650 |
|
4 |
|a Computer aided design
|9 24299
|
650 |
|
4 |
|a Engineering
|9 17712
|
650 |
|
4 |
|a Electronic and Computer Engineering
|9 64855
|
650 |
|
4 |
|a Computer-Aided Engineering (CAD, CAE) and Design
|9 64865
|
700 |
1 |
|
|a Rutenbar, Rob A.
|9 67890
|
852 |
|
|
|a GR-PaULI
|b ΠΑΤΡΑ
|b ΒΚΠ
|
856 |
4 |
0 |
|u http://dx.doi.org/10.1007/b117054
|
942 |
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|d 2016-04-24
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|r 2016-04-24 00:00:00
|w 2016-04-24
|y ERS
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999 |
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|c 47260
|d 47260
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