Interconnect Noise Optimization in Nanometer Technologies
Main Author: | Elgamel, Mohamed A. |
---|---|
Other Authors: | Bayoumi, Magdy A. |
Format: | Electronic Kit Book |
Language: | English |
Published: |
Boston, MA
Springer Science+Business Media, Inc.
2006
|
Subjects: | |
Online Access: | http://dx.doi.org/10.1007/0-387-29366-3 |
Similar Items
-
SystemVerilog for Design A Guide to Using SystemVerilog for Hardware Design and Modeling
by: Sutherland, Stuart
Published: (2006) -
Systemverilog for Verification A Guide to Learning the Testbench Language Features
by: Spear, Chris
Published: (2006) -
Scalable Hardware Verification with Symbolic Simulation
by: Bertacco, Valeria
Published: (2006) -
Leakage in Nanometer CMOS Technologies
by: Narendra, Siva G.
Published: (2006) -
CMOS Current-Mode Circuits for Data Communications
by: Yuan, Fei
Published: (2007)