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LEADER |
01370nom a2200373 u 4500 |
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10073004 |
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upatras |
005 |
20210117201740.0 |
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090513s2006 eng |
020 |
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|a 9780387364957
|
040 |
|
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|a GR-PaULI
|c GR-PaULI
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041 |
0 |
|
|a eng
|
100 |
1 |
|
|a Sutherland, Stuart
|9 71707
|
245 |
1 |
0 |
|a SystemVerilog for Design
|h [electronic resource]
|b A Guide to Using SystemVerilog for Hardware Design and Modeling
|c by Stuart Sutherland, Simon Davidmann, Peter Flake
|
250 |
|
|
|a Second Edition
|
260 |
|
|
|a Boston, MA
|b Springer Science+Business Media, LLC
|c 2006
|
300 |
|
|
|b v.: digital
|
650 |
|
4 |
|a Engineering
|9 17712
|
650 |
|
4 |
|a Computer engineering
|9 24296
|
650 |
|
4 |
|a Computer aided design
|9 24299
|
650 |
|
4 |
|a Systems engineering
|9 64844
|
650 |
|
4 |
|a Computer hardware
|9 64893
|
650 |
|
4 |
|a Engineering
|9 17712
|
650 |
|
4 |
|a Electronic and Computer Engineering
|9 64855
|
650 |
|
4 |
|a Computer-Aided Engineering (CAD, CAE) and Design
|9 64865
|
650 |
|
4 |
|a Circuits and Systems
|9 24301
|
650 |
|
4 |
|a Computer Hardware
|9 64894
|
700 |
1 |
|
|a Davidmann, Simon
|9 71708
|
700 |
1 |
|
|a Flake, Peter
|9 71709
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852 |
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|a GR-PaULI
|b ΠΑΤΡΑ
|b ΒΚΠ
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856 |
4 |
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|u http://dx.doi.org/10.1007/0-387-36495-1
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942 |
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952 |
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|d 2016-04-24
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|r 2016-04-24 00:00:00
|w 2016-04-24
|y ERS
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999 |
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|c 49249
|d 49249
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