|
|
|
|
LEADER |
01136nom a2200313 u 4500 |
001 |
10093777 |
003 |
upatras |
005 |
20210117203013.0 |
008 |
110802s2010 eng |
020 |
|
|
|a 9781441909312
|
040 |
|
|
|a GR-PaULI
|c GR-PaULI
|
041 |
0 |
|
|a eng
|
100 |
1 |
|
|a Garg, Rajesh
|9 95491
|
245 |
1 |
0 |
|a Analysis and Design of Resilient VLSI Circuits
|h [electronic resource]
|b Mitigating Soft Errors and Process Variations
|c by Rajesh Garg, Sunil P. Khatri
|
260 |
|
|
|a Boston, MA
|b Springer-Verlag US
|c 2010
|
300 |
|
|
|b v.: digital
|
650 |
|
4 |
|a Engineering
|9 17712
|
650 |
|
4 |
|a Computer aided design
|9 24299
|
650 |
|
4 |
|a Systems engineering
|9 64844
|
650 |
|
4 |
|a Engineering
|9 17712
|
650 |
|
4 |
|a Circuits and Systems
|9 24301
|
650 |
|
4 |
|a Computer-Aided Engineering (CAD, CAE) and Design
|9 64865
|
700 |
1 |
|
|a Khatri, Sunil P
|9 94467
|
710 |
2 |
|
|a SpringerLink (Online service)
|9 68735
|
852 |
|
|
|a GR-PaULI
|b ΠΑΤΡΑ
|b ΒΚΠ
|
856 |
4 |
0 |
|u http://dx.doi.org/10.1007/978-1-4419-0931-2
|
942 |
|
|
|2 ddc
|
952 |
|
|
|0 0
|1 0
|4 0
|7 0
|9 101691
|a LISP
|b LISP
|d 2016-04-24
|l 0
|r 2016-04-24 00:00:00
|w 2016-04-24
|y ERS
|
999 |
|
|
|c 69477
|d 69477
|