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|a Βιβλιοθήκη ΕΑΙΤΥ
|c Βιβλιοθήκη ΕΑΙΤΥ
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| 041 |
0 |
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|a eng
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| 245 |
1 |
0 |
|a Logic Minimization Algorithms for VLSI Synthesis
|
| 260 |
|
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|a Boston
|b Kluwer Academic Publishers
|c c1984
|
| 300 |
|
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|a ix, 193p.
|b fig.
|
| 490 |
0 |
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|a Kluwer International Series in Engineering and Computer Science
|
| 500 |
|
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|a Βιβλιογραφία: σσ.174-190
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|a INTEGRATED CIRCUITS
|9 24300
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| 650 |
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4 |
|a VLSI
|9 24366
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| 700 |
1 |
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|a Brayton, Robert K.
|4 aut
|9 114718
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| 700 |
1 |
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|a Hachtel, Gary D.
|4 aut
|9 71701
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| 760 |
0 |
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|a Kluwer International Series in Engineering and Computer Science
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| 852 |
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