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|a 0 262 06096 5
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|a Βιβλιοθήκη ΕΑΙΤΥ
|c Βιβλιοθήκη ΕΑΙΤΥ
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|a eng
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|a Logic Testing and Design for Testability
|
260 |
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|a Cambridge
|a Mass.
|b Massachusetts Institute of Technology Cambridge Mass.
|c c1985
|
300 |
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|a x, 284p.
|b fig.
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490 |
0 |
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|a MIT Press Series in Computer Systems
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500 |
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|a Βιβλιογραφία: σσ.272-278
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650 |
|
4 |
|a INTEGRATED CIRCUITS
|9 24300
|
650 |
|
4 |
|a VLSI
|9 24366
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700 |
1 |
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|a Fujiwara, Hideo
|4 aut
|9 115229
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760 |
0 |
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|a MIT Press Series in Computer Systems
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852 |
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|a GR-PaULI
|b ΠΑΤΡΑ
|b ΤΜΗΥΠ
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|w 2016-04-24
|y BK15
|x Μεταφορά από Τμ. Μηχανικών ΗΥ & Πληροφορικής
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999 |
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|c 82394
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