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| LEADER |
01373nam a22003253u 4500 |
| 001 |
10105212 |
| 003 |
upatras |
| 005 |
20210505160547.0 |
| 008 |
991022s eng |
| 020 |
|
|
|a 0 7923 8166 1
|
| 040 |
|
|
|a Βιβλιοθήκη ΕΑΙΤΥ
|c Βιβλιοθήκη ΕΑΙΤΥ
|
| 041 |
0 |
|
|a eng
|
| 245 |
1 |
0 |
|a The Verilog hardware description language
|
| 250 |
|
|
|a 4th ed.
|
| 260 |
|
|
|a Boston
|b Kluwer Academic Publishers
|c c1998
|
| 300 |
|
|
|a xvi,354p.
|b fig.
|
| 500 |
|
|
|a includes CD-ROM
|
| 650 |
|
4 |
|a COMPUTER HARDWARE
|9 115747
|
| 650 |
|
4 |
|a PROGRAMMING LANGUAGES
|9 24271
|
| 650 |
|
4 |
|a Παραγγελία
|9 123966
|
| 650 |
|
4 |
|a ΕΠΕΑΕΚ
|9 116438
|
| 650 |
|
4 |
|a VHDL
|9 74946
|
| 700 |
1 |
|
|a Moorby, Philip R.
|4 aut
|9 123967
|
| 700 |
1 |
|
|a Thomas, Donald
|4 aut
|9 123968
|
| 852 |
|
|
|a GR-PaULI
|b ΠΑΤΡΑ
|b ΤΜΗΥΠ
|h 005.133 VER
|t 1
|
| 852 |
|
|
|a GR-PaULI
|b ΠΑΤΡΑ
|b ΤΜΗΥΠ
|h 005.133 VER
|t 2
|
| 942 |
|
|
|2 ddc
|
| 952 |
|
|
|0 0
|1 0
|2 ddc
|4 0
|6 005_133000000000000_VER
|7 0
|8 NFIC
|9 136735
|a LISP
|b LISP
|c ALFe
|d 2016-04-24
|l 0
|o 005.133 VER
|p 025000284717
|r 2016-04-24 00:00:00
|t 1
|w 2016-04-24
|y BK15
|x Μεταφορά από Τμ. Μηχανικών ΗΥ & Πληροφορικής
|
| 952 |
|
|
|0 0
|1 0
|2 ddc
|4 0
|6 005_133000000000000_VER
|7 0
|9 136736
|a LISP
|b LISP
|c ALFe
|d 2016-04-24
|l 0
|o 005.133 VER
|p 025000284716
|r 2016-04-24 00:00:00
|t 1
|w 2016-04-24
|y BK15
|
| 999 |
|
|
|c 89535
|d 89535
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