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|a Βιβλιοθήκη ΕΑΙΤΥ
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|a eng
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| 245 |
1 |
0 |
|a Verilog HDL
|b A guide to digital design and synthesis
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| 260 |
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|a Mountain Vew
|a CA
|b Prentice Hall
|c c1996
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| 300 |
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|a xxxviii,396p.
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| 650 |
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4 |
|a PROGRAMMING LANGUAGES
|9 24271
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| 650 |
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4 |
|a Παραγγελία
|9 123966
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| 650 |
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4 |
|a ΕΠΕΑΕΚ
|9 116438
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| 650 |
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4 |
|a VHDL
|9 74946
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| 700 |
1 |
|
|a Palnitkar, Samir
|4 aut
|9 124035
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| 852 |
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|a GR-PaULI
|b ΠΑΤΡΑ
|b ΤΜΗΥΠ
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|y BK15
|x Μεταφορά από Τμ. Μηχανικών ΗΥ & Πληροφορικής
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| 999 |
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|c 89587
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