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20210117204156.0 |
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991022s eng |
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|a 1 55860 428 6
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|a Βιβλιοθήκη ΕΑΙΤΥ
|c Βιβλιοθήκη ΕΑΙΤΥ
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|a eng
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082 |
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|a 004.22 PAT
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245 |
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|a Computer organization and design
|b The hardware/software interface
|c John L. Hennessy, David A. Patterson
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250 |
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|a 2nd ed.
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260 |
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|a San Francisco
|b Morgan Kaufmann Publishers
|c c1998
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300 |
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|a xxix,759p. append.
|b fig.
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500 |
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|a ΕΠΕΑΕΚ/ΙΤΥ
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504 |
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|a περιέχει γλωσσάρη : σσ. G-1 -G-13, και ευρετήριο : σσ. I-1 - I-32
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505 |
1 |
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|a Foreword
|a Worked examples
|a Computer organization and design online
|a Preface
|a Chapters : 1.Computer abstractions and technology
|a 1.1 Introduction
|a 1.2 Below your Program
|a 1.3 Under the Covers
|a 1.4 Integrated Circuits : Fueling Innovation
|a 1.5 Real Stuff : Manufacturing Pentium Chips
|a 1.6 Fallacies and Pitfalls
|a 1.7 Concluding Remarks
|a 1.8 Historical Perspective and Further Readings
|a 1.9 Key Terms
|a 1.10 Exercises
|a 2.The role of performance
|a 2.1 Introduction
|a 2.2 Measuring Performance
|a 2.3 Relating the Metrics
|a 2.4 Choosing Programs to Evaluate Performance
|a 2.5 Comparing and Summarizing Performance
|a 2.6 Real Stuff : The SPEC95 Benchmarks and Performance of Recent Processors
|a 2.7 Fallacies and Pitfalls
|a 2.8 Concluding Remarks
|a 2.9 Historical Perspective and Futher Readings
|a 2.10 Key Times
|a 2.11 Exercises
|a 3. Instructions:Language of the machine
|a 3.1 Introduction
|a 3.2 Operations of the Computer Hardware
|a 3.3 Operands of the Computer Hardware
|a 3.4 Representing Instructions in the Computer
|a 3.5 Instructions for Making Decisions
|a 3.6 Supporting Procedures in Computer Hardware
|a 3.7 Beyond Numbers
|a 3.8 Other Styles of MIPS Addressing
|a 3.9 Starting a Program
|a 3.10 An Example to Put It All Together
|a 3.11 Arrays versus Pointers
|a 3.12 Real Stuff : PowerPC and 80X86 Instructions
|a 3.13 Fallacies and Pitfalls
|a 3.14 Concluding Remarks
|a 3.15 Historical Perspective and Futher Reading
|a 3.16 Key Times
|a 3.17 Exercises
|a 4. Arithmetic for computers
|a 4.1 Introduction
|a 4.2 Signed and Unsigned Numbers
|a 4.3 Addition and Subtraction
|a 4.4 Logical Operations
|a 4.5 Constructing an Arithmetic Logic Unit
|a 4.6 Multiplication
|a 4.7 Division
|a 4.8 Floating Point
|a 4.9 Real Stuff: Floating Point in the PowerPC and 80X 86
|a 4.10 Fallacies and Pitfalls
|a 4.11 Concluding Remarks
|a 4.12 Historical Pespective and Futher Reading
|a 4.13 Key Times
|a 4.14 Exercises
|a 5.The processor: Datapath and control
|a 5.1 Introduction
|a 5.2 Building a Datapath
|a 5.3 A Simple Implemantation Scheme
|a 5.4 A Multicycle Implementation
|a 5.5 Microprogramming: Simplifying Control Design
|a 5.6 Exceptions
|a 5.7 Real Stuff: The Pentium Pro Implementation
|a 5.8 Fallacies and Pitfalls
|a 5.9 Concluding Remarks
|a 5.10 Historical Perspective and Futher Reading
|a 5.11 Key Times
|a 5.12 Exercises
|a 6. Enhancing performance with pipelining
|a 6.1 An Overview of Pipelining
|a 6.2 A Pipelined Datapath
|a 6.3 Pipelined Control
|a 6.4 Data Hazards and Forwarding
|a 6.5 Data Hazards and Stalls
|a 6.6 Branch Hazards
|a 6.7 Exceptions
|a 6.8 Superscalar and Dynamic Pipelining
|a 6.9 Real Stuff:PowerPC 604 and Pentium Pro Pipelines
|a 6.10 Fallacies and Pitfalls
|a 6.11 Concluding Remarks
|a 6.12 Historical Perspective and Further Reading
|a 6.13 Key Times
|a 6.14 Exercises
|a 7. Large and fast:Exploiting memory hierarchy
|a 7.1 Introduction
|a 7.2 The Basics of Caches
|a 7.3 Measuring and Improving Cache Performance
|a 7.4 Virtual Memory
|a 7.5 A Common Framework for Memory Hierarchies
|a 7.6 Real Stuff:The Pentium Pro and PowerPC 604 Memory Hierarchies
|a 7.7 Fallacies and Pitfalls
|a 7.8 Concluding Remarks
|a 7.9 Historical Perspective and Further Reading
|a 7.10 Key Times
|a 7.11Exercises
|a 8. Interfacing processors and peripherals
|a 8.1 Introduction
|a 8.2 I/O Performance Measures: Some Examples from Disk and File Systems
|a 8.3 Types and Characteristics of I/O Devices
|a 8.4 Buses : Connecting I/O Devices to Processor and Memory
|a 8.5 Interfacing I/O Devices to the Memory, Processor, and Operating System
|a 8.6 Designing an I/O System
|a 8.7 Real Stuff : A Typical Desktop I/O System
|a 8.8 Fallacies and Pitfalls
|a 8.9 Concluding Remarks
|a 8.10 Historical Perspective and Further Reading
|a 8.11 Key Times
|a 8.12 Exercises
|a 9. Multiprocessors
|a 9.1 Introduction
|a 9.2 Programming Multiprocessors
|a 9.3 Multiprocessors Connected by a Single Bus
|a 9.4 Multiprocessors Connected by a Network
|a 9.5 Clusters
|a 9.6 Network Topologies
|a 9.7 Real Stuff : Future Directions for Multiprocessors
|a 9.8 Fallacies and Pitfalls
|a 9.9 Concluding Remarks - Evolution versus Revolution in Computer Architecture
|a 9.10 Historical Perspective and Further Reading
|a 9.11 Key Times
|a 9.12 Exercises
|a APPENDICES: A. Assemblers,linkers, and the SPIM simulator
|a A.1 Introduction
|a A.2 Assembles
|a A.3 Linkers
|a A.4 Loading
|a A.5 Memory Usage
|a A.6 Procedure Call Convention
|a A.7 Exceptions and Interrupts
|a A.8 Input and Output
|a A.9 SPIM
|a A.10 MIPS R2000 Assembly Language
|a A.11 Concluding Remarks
|a A.12 Key Times
|a A.13 Exercises
|a B. The basics of logic design
|a B.1 Introduction
|a B.2 Gates, Truth Tables, and Logic Equations
|a B.3 Combinational Logic
|a B.4 Clocks
|a B.5 Memory Elements
|a B.6 Finite State Machines
|a B.7 Timing Methodologies
|a B.8 Concluding Remarks
|a B.9 Key Times
|a B.10 Exercises
|a C. Mapping control to hardware
|a C.1 Introduction
|a C.2 Implementing Combinatorial Control Units
|a C.3 Implementing Finite State Machine Control
|a C.4 Implementing the Next-State Function with a Sequencer
|a C.5 Translating a Microprogram to Hardware
|a C.6 Concluding Remarks
|a C.7 Key Times
|a C.8 Exercises
|a Glossary
|a Index
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650 |
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4 |
|a COMPUTER DESIGN
|9 24284
|
650 |
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4 |
|a COMPUTER ORGANIZATION
|9 113755
|
650 |
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4 |
|a ΕΠΕΑΕΚ
|9 116438
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700 |
1 |
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|a Hennessy, John L.
|4 aut
|9 22790
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700 |
1 |
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|a Patterson, David A.
|4 aut
|9 47033
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852 |
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|a GR-PaULI
|b ΠΑΤΡΑ
|b ΤΜΗΥΠ
|h 004.22 PAT
|t 1
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852 |
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|a GR-PaULI
|b ΠΑΤΡΑ
|b ΤΜΗΥΠ
|h 004.22 PAT
|t 2
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|2 ddc
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|r 2016-04-24 00:00:00
|t 1
|w 2016-04-24
|y BK15
|x Μεταφορά από Τμ. Μηχανικών ΗΥ & Πληροφορικής
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|0 0
|1 0
|2 ddc
|4 0
|6 004_220000000000000_PAT
|7 0
|8 NFIC
|9 137472
|a LISP
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|c ALFe
|d 2016-04-24
|l 0
|o 004.22 PAT
|p 025000285504
|r 2016-04-24 00:00:00
|t 2
|w 2016-04-24
|y BK15
|x Μεταφορά από Τμ. Μηχανικών ΗΥ & Πληροφορικής
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|c 89999
|d 89999
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