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| LEADER |
01848nam a2200289 u 4500 |
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10106751 |
| 003 |
upatras |
| 005 |
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|0 0
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|6 621_381000000000000_537_HIL
|7 0
|9 141417
|a LISP
|b LISP
|c ALFg
|d 2016-04-24
|l 0
|o 621.381 537 HIL
|p 025000289730
|r 2016-04-24 00:00:00
|t 1
|w 2016-04-24
|y BK15
|x Μεταφορά από Τμ. Μηχανικών ΗΥ & Πληροφορικής
|
| 999 |
|
|
|c 92523
|d 92523
|
| 020 |
|
|
|a 0 471 04273 0
|
| 040 |
|
|
|a Βιβλιοθήκη ΕΑΙΤΥ
|c Βιβλιοθήκη ΕΑΙΤΥ
|
| 040 |
|
|
|a XX-XxUND
|c Βιβλιοθήκη ΕΑΙΤΥ
|
| 082 |
|
|
|2 23
|a 621.381 537
|
| 245 |
1 |
0 |
|a Introduction to Switching Theory and Logical Design
|c Frederick J. Hill, Gerald R. Peterson
|
| 250 |
|
|
|a 3rd ed.
|
| 260 |
|
|
|a New York
|b John Wiley & Sons
|c 1981
|
| 300 |
|
|
|a xv, 617 p., fig.
|
| 500 |
|
|
|a Είναι δωρεά του κ. Γαλλόπουλου
|
| 504 |
|
|
|a Index pp. 611-617
|
| 505 |
1 |
|
|a contents: 1.Introduction, 2.Number systems, 3.Truth functions, 4.Boolean algebra, 5.Switching devices, 6.Minimization of boolean functions, 7.Tabular minimization and multiple-output circuits, 8.Special realizations and codes, 9.Introduction to sequential circuits, 10.Synthesis of clock-mode sequential circuits, 11.Clock-control and pulse-mode circuits, 12.Logical design using MSI and LSI parts, 13.Incompletely specified sequential circuits, 14.Level-mode sequental circuits, 15.A second look at flip-flops and timing, 16.Combinational functions with special properties, Appendix A:Selection of minimal closed covers, Appendix B:Relay circuits, Index.
|
| 650 |
|
4 |
|a ΓΑΛΛΟΠΟΥΛΟΣ
|9 113813
|
| 700 |
1 |
|
|a HILL, FREDRICK J.
|4 aut
|9 127178
|
| 700 |
1 |
|
|a PETERSON, GERALD R.
|4 aut
|9 127179
|
| 852 |
|
|
|a GR-PaULI
|b ΠΑΤΡΑ
|b ΤΜΗΥΠ
|t 1
|
| 942 |
|
|
|2 ddc
|c BK15
|
