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|a Βιβλιοθήκη ΕΑΙΤΥ
|c Βιβλιοθήκη ΕΑΙΤΥ
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040 |
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|a XX-XxUND
|c Βιβλιοθήκη ΕΑΙΤΥ
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082 |
1 |
4 |
|a 621.381 5
|2 21h
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1 |
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|a Computer - Aided Designs Tools for Digital Systems
|b TUTORIAL. A tutorial on design automation tools at the architecture and register - transfer level
|c W. M. vanCleemput
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250 |
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|a 2nd ed.
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260 |
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|a New York
|b The Institute of Electrical and Electronic Engineers, Inc.
|c c1979
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300 |
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|a v, 168 p., fig.
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504 |
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|a Περιέχει Βιβλιογραφικές Αναφορές
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505 |
1 |
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|a Preface
|a Part 1: Introduction
|a The Role of Design Automation in the Design of Digital Systems
|a A Structured Design Automation Environment for Digital Systems
|a Part II : Design Languages
|a A Survey of Computer Hardware Description Language in the USA
|a Introducing PMS
|a An Hierarchical Language for the Structural Description of Digital Systems
|a SCALD:Structured Computer-Aided Logic Design
|a An Architectural Research Facility - ISP Descriptions, Simulation, Data Collection
|a Introducing CDL/ Yaohan Chu
|a Introducing CDL /D.L. Dietmeyer
|a Introducing AHPL / Frederick J. Hill
|a Part III : System Level Description
|a LOGOS and the Software Engineer
|a Modeling for Syntesis - The Gap Between Intent and Behavior
|a State of the Implementation of SARA
|a Multi-Level Modeling in SARA
|a The Graph Model of Behavior Simulator
|a Developing a SARA Building Block - The 8080
|a Specialization of SARA for Software Synthesis
|a Part IV : System Level Simulation
|a Computer System Simulation : An Introduction
|a Part V : Register Transfer and Gate Level Simulation
|a Design Verification at the Register Transfer Language Level
|a Digital Logic Simulation In a Time - Based, Table - Driven Environment. Part 1. Design Verification
|a Digital Logic Simulation In a Time-Based, Table-Driven Environment. Part 2. Parallel Fault Simulation
|
650 |
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4 |
|a Ηλεκτρονικοί υπολογιστές
|x Μελέτη και διδασκαλία
|9 121737
|
650 |
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4 |
|a COMPUTER AIDED DESIGN
|9 24299
|
650 |
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4 |
|a DIGITAL SYSTEMS
|9 113234
|
650 |
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4 |
|a ΓΑΛΛΟΠΟΥΛΟΣ
|9 113813
|
700 |
1 |
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|a VANCLEEMPUT, W.M.
|4 aut
|9 127374
|
852 |
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|a GR-PaULI
|b ΠΑΤΡΑ
|b ΤΜΗΥΠ
|h 621.3815 VAN
|t 1
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|2 ddc
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|0 0
|1 0
|4 0
|6 621_381500000000000_VAN
|7 0
|9 141722
|a CEID
|b CEID
|d 2016-04-24
|l 0
|o 621.3815 VAN
|r 2016-04-24 00:00:00
|t 1
|w 2016-04-24
|
999 |
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|c 92707
|d 92707
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