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03183nam a2200301 u 4500 |
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upatras |
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20210909093247.0 |
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050111s2003 nyua eng |
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|1 0
|2 ddc
|4 0
|6 621_381000000000000_5_DIG
|7 0
|8 NFIC
|9 142569
|a LISP
|b LISP
|c ALFe
|d 2016-04-24
|l 0
|o 621.381 5 DIG
|p 025000281079
|r 2016-04-24 00:00:00
|t 1
|w 2016-04-24
|y BK15
|x Μεταφορά από Τμ. Μηχανικών ΗΥ & Πληροφορικής
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|c 93245
|d 93245
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|a 047127447X
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| 040 |
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|a Ινστιτούτο Τεχνολογίας Υπολογιστών
|c Ινστιτούτο Τεχνολογίας Υπολογιστών
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| 082 |
1 |
4 |
|a 621.381 5
|2 21
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| 245 |
1 |
0 |
|a Digital system clocking :
|b high performance and low-power aspects /
|c Vojin G. Oklobdzija ... [et al.].
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| 260 |
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|a New York ;
|a Hoboken :
|b IEEE ;
|b John Wiley,
|c c2003.
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| 300 |
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|a xv, 245 σ. :
|b εικ. ;
|c 24 εκ.
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| 504 |
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|a Περιλαμβάνει βιβλιογραφικές παραπομπές και ευρετήριο.
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| 505 |
1 |
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|a Preface
|a Chapter 1 : Introduction
|a 1.1 Clocking in Synchronous Systems
|a 1.2 System Clock Design
|a 1.3 Timing Parameters
|a 1.4 Clock Signal Distribution
|a Chapter 2 : Theory of Clocked Storage Elements
|a 2.1 Latch-Based Clocked Storage Elements
|a 2.2. Flip-Flop
|a Chapter 3 : Timing and Energy Parameters
|a 3.1 Timing Parameters
|a 3.2 Energy Parameters
|a 3.3 Interface with Clock Network and Combinational Logic
|a Chapter 4 : Pipelining and Timing Analysis
|a 4.1 Analysis of System that Uses a Flip-Flop
|a 4.2 Analysis of a System that Uses a Single Latch
|a 4.3 Analysis of a System with a Two - Phase Clock
|a 4.4 Analysis of a System with a Sihgle -Phase Clock and Dual-Edge-Triggered Storage Elements
|a Chapter 5 : High-Performance System Issues
|a 5.1 Absorbing Clock Uncertainties
|a 5.2 Time Borrowing
|a 5.3 Time Borrowing and Clock Uncertainty
|a Chapter 6 : Low-Energy System Issues
|a 6.1 Low-Swing Circuit Techniques
|a 6.2 Clock Gating
|a 6.3 Dual -Edge Triggering
|a 6.4 Glitch Robust Design
|a Chapter 7 : Simulation Techniques
|a 7.1 Simulation Techniques
|a 7.2 Environment Setup
|a 7.3 Appendix
|a Chapter 8 : State -of-the Art Clocked Storage Elements in CMOS Technology
|a 8.1 Master - Slave Latch Examples
|a 8.2 Flip-Flop Examples
|a 8.3 Clocked Storage Elements with Local Clock Gating
|a 8.4 Low-Swing Clock Storage Elements
|a 8.5 Dual-Edge-Triggered Clocked Storage Elements
|a 8.6 Summary
|a Chapter 9 : Microprocessors Examples
|a 9.1 Clocking for Intel Microprocessors
|a 9.2 Sun Microsystems Ultrasparc - III Clocking
|a 9.3 Alpha Clocking : A Historical Overview
|a 9.4 Clocked Storage Elements in IBM Processors
|a References
|a Index
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| 650 |
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4 |
|a Διαχείριση μνήμης (Επιστήμη των υπολογιστών)
|9 82617
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| 650 |
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4 |
|a Ολοκληρωμένα κυκλώματα χαμηλής τάσης
|9 139961
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| 650 |
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4 |
|a Ηλεκτρονικοί ψηφιακοί υπολογιστές
|9 1983
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| 700 |
1 |
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|a Oklobdzija, Vojin G
|4 aut
|9 93307
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| 700 |
1 |
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|a Stojanovic, Vladimir M
|4 aut
|9 127985
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| 700 |
1 |
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|a Markovic, Dejan M
|4 aut
|9 127986
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| 700 |
1 |
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|a Nedovic, Nikola M
|4 aut
|9 127987
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| 852 |
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|a GR-PaULI
|b ΠΑΤΡΑ
|b ΤΜΗΥΠ
|h 621.395 OKL
|t 1
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| 942 |
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|2 ddc
|c BK
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