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|a 0133007081
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|a Ινστιτούτο Τεχνολογίας Υπολογιστών
|c Ινστιτούτο Τεχνολογίας Υπολογιστών
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|a XX-XxUND
|c Ινστιτούτο Τεχνολογίας Υπολογιστών
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|a 006.3
|2 20η
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| 245 |
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|a Discrete Neural Computation
|b A Theoretical Foundation
|c Kai-Yeung Siu, Vwani Roychowdhury, Thomas Kailath, (Foreword by Marvin Minsky)
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| 260 |
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|a Upper Saddle River, New Jersey
|b Prentice Hall PTR
|b c1995
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| 300 |
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|a xxiv,407p.
|b fig.
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| 490 |
1 |
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|a Prentice Hall Information and Systems Scinces Series / Thomas Kailath ed.
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| 504 |
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|a Glossary: pp. 387 -388, Bibliography : pp. 389 - 399, Index : pp. 401 - 407. Ανα κεφάλαιο Περιέχει ασκήσεις και βιβλιογραφικές σημειώσεις.
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| 505 |
1 |
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|a Preface
|a 1. Introduction
|a 1.1 Aspects of neural Computation
|a 1.1.1 Learning
|a 1.1.2 Representation
|a 1.2 Concepts in Discrete Neural Computation
|a 1.2.1 Feedforward Model
|a 1.2.2 Circuit as a model of Parallel Computation
|a 1.2.3 Types of Fuctional Elements
|a 1.2.4 Hopfield Model
|a 1.3 Complexity Issues in Discrete Neural Computation
|a 1.3.1 A Circuit Complexity Point of View
|a 1.3.2 Complexity Measures for Feedforward Model
|a 1.3.3 Continuous - Valued Elements vs. Binary Elements
|a 1.3.4 Complexity Issues in Hopfield Model
|a 1.4 Examples
|a 1.4.1 The Parity Function
|a 1.4.2 Multiplication and Other Arithmetic Functions
|a 1.4.3 The Comparison Function
|a 1.4.4 Symmetry Recognition/The Eguality Function
|a 1.5 Analytical Techniques
|a 1.5.1 Spectral / Polynomial Representation of Boolean Functions
|a 1.5.2 Rational Approximation
|a 1.5.3 Geometric and linear Algebraic Arguments
|a 1.5.4 Communication Complexity Arguments
|a 1.6 A Historical Perspective
|a 1.7 An Overview of the Book
|a 1.7.1 Linear Threshold Element (LTE) and its Properties
|a 1.7.2 Computing Symmetric Functions
|a 1.7.3 Depth -Efficient Arithmetic Circuits
|a 1.7.4 Depth / Size Trade-offs and Optimization Issues
|a 1.7.5 Computing with Small Weights
|a 1.7.6 Rational Approximation and Optimal-Size Circuits
|a 1.7.7 Spectral Analysis and Geometric Approach
|a 1.7.8 Limitations of AND - OR Circuits
|a 1.7.9 Lower Bounds for Unbounded Dept Circuits
|a 1.7.10 The Hopfield Model
|a 1.8 Notes on Terminology
|a 2. Linear Threshold Element
|a 2.1 Introduction
|a 2.2 Linear Threshold Elements
|a 2.3 perseptron Learning Algorithm
|a 2.4 Analysis of Linearly Nonseparable Sets of input Vectors
|a 2.4.1 Necessary and Sufficient Conditions for Linear Nonseparability
|a 2.4.2 Structures Within Linearly Nonseparable Training Sets
|a 2.5 Learning Problems for Linearly Nonseparable Sets
|a 2.5.1 A Heuristic Algorithm
|a 2.6 Learning Algorithm for Linearly Nonseparable Sets
|a 2.6.1 A Dual Learning Problem
|a 2.6.2 Determining Linearly Separable Subsets
|a 2.7 Capacity of Linear Threshold Elements
|a 2.7.1 Number of Binary Functions Implementable by an LTE
|a 2.7.2 A Lower Bound on the Number of Linearly Separable Functions
|a 2.7.3 Tighter Lower Bound on the Number of Linearly Separable Functions
|a 2.7.4 Number of Weights in Universal Networks
|a 2.8 Large Integer Weights are Sufficient
|a Exercises
|a Bibliographic Notes
|a 3. Computing Symmetric Functions
|a 3.1 Introduction
|a 3.2 A Depth - 2 Construction
|a 3.3 A Depth - 3 Construction
|a 3.4 Generalized Symmetric Functions
|a 3.5 Hyperplane Cuts of a Hypercube
|a Exercises
|a Bibliographic Notes
|a 4. Depth - Efficient Arithmetic Circuits
|a 4.1 Introduction
|a 4.2 Depth - 2 Threshold Circuits for Comparison and Addition
|a 4.2.1 Existence Proof via Harmonic Analysis
|a 4.2.2 Explicit Constructions Based on Error - Correcting Codes
|a 4.3 Multiple Sum and Multiplication
|a 4.4 Division and Related Problems
|a 4.4.1 Exponentiation and Powering Modulo a "Small" Number
|a 4.4.2 Powering in Depth - 4
|a 4.4.3 Multiple Product in Depth - 5
|a 4.4.4 Division in Depth - 4
|a 4.5 Sorting in Depth - 3 Threshold Circuits
|a 4.6 Lower Bounds for Division and Sorting
|a Exercises
|a Bibliographic Notes
|a 5. Depth / Size Trade - offs
|a 5.1 Introduction
|a 5.2 Trade - offs between Node Complexity and Circuit Depth
|a 5.2.1 Parity
|a 5.2.2 Multiple Sum
|a 5.3 Trade - offs for Comparison and Addition
|a 5.4 Addition and Parallel Prefix Circuits
|a 5.4.1 Parallel prefix Circuits
|a 5.4.2 Circuits for Addition
|a 5.5 Trade - offs for Symmetric Functions and Multiplication
|a 5.5.1 Computing the Sum of n Bits
|a 5.5.2 Symmetric Functions and Multiplication
|a Exercises
|a Bibliographic Notes
|a 6. Computing with Small Weights
|a 6.1 Introduction
|a 6.2 Necessity of Exponential Weights
|a 6.3 Depth / Weight Trade - offs
|a 6.3.1 Approximating Functions in LT1
|a 6.3.2 Simulating LTd in LTd+1
|a 6.4 Optimal - Depth Circuits for Multiplication and Division
|a Exercises
|a Bibliographic Notes
|a 7. Rational Approximation and Optimal - Size Circuits
|a 7.1 Introduction
|a 7.2 Lower Bounds on Threshold Circuits
|a 7.2.1 Approximating Parity with Threshold Circuits
|a 7.3 Extensions to Threshold Circuits with Various Gates
|a 7.4 Lower Bounds on Networks with Continuous - Valued Elements
|a Exercises
|a Bibliographic Notes
|a 8. Geometric Framework and Spectral Analysis
|a 8.1 Introduction
|a 8.2 Geometric Concepts and Definitions
|a 8.3 Uniqueness
|a 8.4 Generalized Spectrum
|a 8.4.1 Characterizations with Generalized L1 Spectral Norms
|a 8.5 Spectral / Polynomial Representation
|a 11
|a 11.4 Combinatorial Optimization
|a 11.4.1 Min - Cut and Related Problems
|a 11.4.2 The Traveling - Salesman Problem
|a Exercises
|a Bibliographic Notes
|a Glossary
|a Bibliography
|a Index
|
| 650 |
|
4 |
|a Εύκαμπτη υπολογιστική
|9 24342
|
| 650 |
|
4 |
|a NEURAL COMPUTERS
|9 113727
|
| 650 |
|
4 |
|a COMPUTATIONAL COMPLEXITY
|9 20484
|
| 650 |
|
4 |
|a ΕΜ1
|9 120380
|
| 650 |
|
4 |
|9 84642
|a Τεχνητή νοημοσύνη
|
| 700 |
1 |
|
|a Siu, Kai-Yeung
|4 arr
|9 128023
|
| 700 |
1 |
|
|a Roychowdhury, Vwani P.
|4 arr
|9 124578
|
| 700 |
1 |
|
|a Kailath, Thomas
|4 arr
|9 110704
|
| 700 |
1 |
|
|a Minsky, Marvin L.
|d 1927-2016
|4 arr
|9 114274
|
| 852 |
|
|
|a GR-PaULI
|b ΠΑΤΡΑ
|b ΤΜΗΥΠ
|h 006.3
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