System-on-a-Chip Verification Methodology and Techniques /
System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level...
Κύριοι συγγραφείς: | Rashinkar, Prakash (Συγγραφέας), Paterson, Peter (Συγγραφέας), Singh, Leena (Συγγραφέας) |
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Συγγραφή απο Οργανισμό/Αρχή: | SpringerLink (Online service) |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Boston, MA :
Springer US,
2002.
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Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Παρόμοια τεκμήρια
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Reuse Methodology Manual for System-on-a-Chip Designs
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Functional Verification Coverage Measurement and Analysis
ανά: Piziali, Andrew
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Advanced ASIC Chip Synthesis Using Synopsys® Design Compiler™ Physical Compiler™ and PrimeTime®
ανά: Bhatnagar, Himanshu
Έκδοση: (2002)