System-on-a-Chip Verification Methodology and Techniques /

• Κύριοι συγγραφείς: Rashinkar, Prakash (Συγγραφέας), Paterson, Peter (Συγγραφέας), Singh, Leena (Συγγραφέας)
• Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
• Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
• Γλώσσα: English
• Έκδοση: Boston, MA : Springer US, 2002.
• Θέματα: Engineering.; Computers.; Computer-aided engineering.; Electrical engineering.; Electronic circuits.; Circuits and Systems.; Computer-Aided Engineering (CAD, CAE) and Design.; Computing Methodologies.; Electrical Engineering.

System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level...

Πίνακας περιεχομένων:

• System-level Verification
• Block-level Verification
• Analog/Mixed Signal Simulation
• Simulation
• Hardware/Software Co-verification
• Static Netlist Verification
• Physical Verification and Design Sign-off.