System-on-a-Chip Verification Methodology and Techniques /

• Main Authors: Rashinkar, Prakash (Author), Paterson, Peter (Author), Singh, Leena (Author)
• Corporate Author: SpringerLink (Online service)
• Format: Electronic eBook
• Language: English
• Published: Boston, MA : Springer US, 2002.
• Subjects: Engineering.; Computers.; Computer-aided engineering.; Electrical engineering.; Electronic circuits.; Circuits and Systems.; Computer-Aided Engineering (CAD, CAE) and Design.; Computing Methodologies.; Electrical Engineering.

System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level...

Table of Contents:

• System-level Verification
• Block-level Verification
• Analog/Mixed Signal Simulation
• Simulation
• Hardware/Software Co-verification
• Static Netlist Verification
• Physical Verification and Design Sign-off.