Formal Techniques for Networked and Distributed Systems FORTE 2001 IFIP TC6/WG6.1 — 21st International Conference on Formal Techniques for Networked and Distributed Systems August 28–31, 2001, Cheju Island, Korea /
FORTE 2001, formerly FORTE/PSTV conference, is a combined conference of FORTE (Formal Description Techniques for Distributed Systems and Communication Protocols) and PSTV (Protocol Specification, Testing and Verification) conferences. This year the conference has a new name FORTE (Formal Techniques...
Συγγραφή απο Οργανισμό/Αρχή: | |
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Άλλοι συγγραφείς: | , , , |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Boston, MA :
Springer US,
2002.
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Σειρά: | IFIP International Federation for Information Processing,
69 |
Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Πίνακας περιεχομένων:
- Formal Methods in Software Development I
- Automated Derivation of ILP Implementations from SDL Specifications
- Stepwise Design with Message Sequence Charts
- Formal Synthesis and Control of Soft Embedded Real-Time Systems
- Distributed Systems Testing
- Towards a Formal Framework for Interoperability Testing
- Distributed Test Using Logical Clock
- Diagnosing Multiple Faults in Communicating Finite State Machines
- From Active to Passive: Progress in Testing of Internet Routing Protocols
- Timed Automata
- Time and Action Lock Freedom Properties for Timed Automata
- Compiling Real-time Scenarios into a Timed Automaton
- Deriving Parameter Conditions for Periodic Timed Automata Satisfying Real-time Temporal Logic Formulas
- Process Algebra
- PAMR: A Process Algebra for the Management of Resources in Concurrent Systems
- A Symbolic Semantics and Bisimulation for Full Lotos
- Implementing a Modal Logic Over Data and Processes Using XTL
- Applications of Verification
- Formal Verification of Peephole Optimizations in Asynchronous Circuits
- Symbolic Verification of Complex Real-time Systems with Clock-restriction Diagram
- Verifying a Sliding-Window Protocol Using PVS
- Test Sequence Derivation
- Test Sequence Selection
- Executable Test Sequence for the Protocol Data Flow Property
- A Method to Generate Conformance Test Sequences for FSM with Timer System Call
- Formal Methods in Software Development II
- A Tool for Generating Specifications from A Family of Formal Requirements
- Patterns and Rules for Behavioural Subtyping
- Theories of Verification
- Verification of Dense Time Properties Using Theories of Untimed Process Algebra
- Testing Liveness Properties
- SVL: A Scripting Language for Compositional Verification
- Invited Papers
- On Formal Techniques in Protocol Engineering — Example Challenges
- A PKI-based End-To-End Secure Infrastructure for Mobile E-Commerce
- A Family of Resource-Bound Real-Time Process Algebras
- Survivability Analysis of Networked Systems.