SOI Circuit Design Concepts
Market demand for microprocessor performance has motivated continued scaling of CMOS through a succession of lithography generations. Quantum mechanical limitations to continued scaling are becoming readily apparent. Partially Depleted Silicon-on-Insulator (PD-SOI) technology is emerging as a promis...
| Κύριοι συγγραφείς: | , |
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| Συγγραφή απο Οργανισμό/Αρχή: | |
| Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
| Γλώσσα: | English |
| Έκδοση: |
Boston, MA :
Springer US,
2000.
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| Θέματα: | |
| Διαθέσιμο Online: | Full Text via HEAL-Link |
Πίνακας περιεχομένων:
- The Time for SOI
- SOI Device Structures
- SOI Device Electrical Properties
- Static Circuit Design Response
- Dynamic Circuit Design Considerations
- SRAM Cache Design Considerations
- Specialized Function Circuits in SOI
- Global Chip Design Considerations
- Future Oppurtunities in SOI.