Principles of Verifiable RTL Design A Functional Coding Style Supporting Verification Processes in Verilog /

• Κύριοι συγγραφείς: Bening, Lionel (Συγγραφέας), Foster, Harry (Συγγραφέας)
• Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
• Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
• Γλώσσα: English
• Έκδοση: Boston, MA : Springer US, 2000.
• Θέματα: Engineering.; Computer hardware.; Computer-aided engineering.; Electrical engineering.; Electronic circuits.; Circuits and Systems.; Computer Hardware.; Computer-Aided Engineering (CAD, CAE) and Design.; Electrical Engineering.

Principles of Verifiable RTL Design: A Functional Coding Style Supporting Verification Processes in Verilog explains how you can write Verilog to describe chip designs at the RT-level in a manner that cooperates with verification processes. This cooperation can return an order of magnitude improveme...

Πίνακας περιεχομένων:

• The Verification Process
• RTL Methodology Basics
• RTL Logic Simulation
• RTL Formal Verification
• Verifiable RTL Style
• The Bad Stuff
• Verifiable RTL Tutorial
• Principles of Verifiable RTL Design.