High-speed CMOS Circuits for Optical Receivers
With the exponential growth of the number of Internet nodes, the volume of the data transported on the backbone has increased with the same trend. The load of the global Internet backbone will soon increase to tens of terabits per second. This indicates that the backbone bandwidth requirements will...
Κύριοι συγγραφείς: | , |
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Συγγραφή απο Οργανισμό/Αρχή: | |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Boston, MA :
Springer US,
2001.
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Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Πίνακας περιεχομένων:
- TIAs and Limiters
- Clock and Data Recovery Architectures
- A CMOS Interface for Detection of 1.2-Gb / s RZ Data
- A 10-Gb/s Linear Half-rate CMOS CDR Circuit
- A 10-Gb/s CMOS CDR Circuit with Wide Capture Range
- Conclusion.