Principles of Verifiable RTL Design A functional coding style supporting verification processes in Verilog /

• Κύριοι συγγραφείς: Bening, Lionel (Συγγραφέας), Foster, Harry (Συγγραφέας)
• Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
• Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
• Γλώσσα: English
• Έκδοση: Boston, MA : Springer US, 2001.
• Έκδοση: Second Edition.
• Θέματα: Engineering.; Computer hardware.; Computer-aided engineering.; Electrical engineering.; Electronic circuits.; Circuits and Systems.; Computer Hardware.; Computer-Aided Engineering (CAD, CAE) and Design.; Electrical Engineering.

System designers, computer scientists and engineers have c- tinuously invented and employed notations for modeling, speci- ing, simulating, documenting, communicating, teaching, verifying and controlling the designs of digital systems. Initially these s- tems were represented via electronic and fabr...

Πίνακας περιεχομένων:

• The Verification Process
• Coverage, Events and Assertions
• RTL Methodology Basics
• RTL Logic Simulation
• RTL Formal Verification
• Verifiable RTL Style
• The Bad Stuff
• Verifiable RTL Tutorial
• Principles of Verifiable RTL Design.