Reuse Methodology Manual for System-on-a-Chip Designs

Reuse Methodology Manual for System-on-a-Chip Designs

Εμφάνιση άλλων εκδόσεων (2)

Features of the Third Edition: UP TO DATE STATE OF THE ART REUSE AS A SOLUTION FOR CIRCUIT DESIGNERS A CHRONICLE OF "BEST PRACTICES" ALL CHAPTERS UPDATED AND REVISED GENERIC GUIDELINES-NON TOOL SPECIFIC EMPHASIS ON HARD IP AND PHYSICAL DESIGN Reuse Methodology Manual for System-on-a-Chip D...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Κύριοι συγγραφείς:	Keating, Michael (Συγγραφέας), Bricaud, Pierre (Συγγραφέας)
Συγγραφή απο Οργανισμό/Αρχή:	SpringerLink (Online service)
Μορφή:	Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:	English
Έκδοση:	Boston, MA : Springer US, 2002.
Έκδοση:	3.
Θέματα:	Engineering. Computer hardware. Computer-aided engineering. Electrical engineering. Electronic circuits. Circuits and Systems. Computer-Aided Engineering (CAD, CAE) and Design. Electrical Engineering. Computer Hardware.
Διαθέσιμο Online:	Full Text via HEAL-Link

Παρόμοια τεκμήρια

VHDL Coding Styles and Methodologies
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Principles of Verifiable RTL Design A Functional Coding Style Supporting Verification Processes in Verilog /
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Principles of Verifiable RTL Design A functional coding style supporting verification processes in Verilog /
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The Complete Verilog Book
ανά: Sagdeo, Vivek
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Verilog® Quicstart A Practical Guide to Simulation and Synthesis in Verilog /
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Writing Testbenches Functional Verification of HDL Models /
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The Verilog PLI Handbook A User’s Guide and Comprehensive Reference on the Verilog Programming Language Interface /
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SystemC Kernel Extensions for Heterogeneous System Modeling A framework for Multi-MoC Modeling & Simulation /
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CMOS Active Inductors and Transformers Principle, Implementation, and Applications /
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Systemverilog for Verification A Guide to Learning the Testbench Language Features /
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Interconnect Noise Optimization in Nanometer Technologies
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Scalable Hardware Verification with Symbolic Simulation
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Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Them /
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SystemVerilog for Verification A Guide to Learning the Testbench Language Features /
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Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design /
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Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
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System Verilog for Verification A Guide to Learning the Testbench Language Features /
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CMOS Current-Mode Circuits for Data Communications
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Leakage in Nanometer CMOS Technologies
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Digital Systems Design and Prototyping Using Field Programmable Logic and Hardware Description Languages /
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Hardware Verification with SystemVerilog An Object-Oriented Framework /
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Post-Silicon and Runtime Verification for Modern Processors
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Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits
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System-on-a-Chip Verification Methodology and Techniques /
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Advanced ASIC Chip Synthesis Using Synopsys® Design Compiler™ Physical Compiler™ and PrimeTime®
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Quantifying and Exploring the Gap Between FPGAs and ASICs Measuring and Exploring /
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SystemC Methodologies and Applications /
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Assertion-Based Design
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Structured Electronic Design Negative-Feedback Amplifiers /
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The Designer’s Guide to Spice and Spectre
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A Designer’s Guide to Built-In Self-Test
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Digital Design and Implementation with Field Programmable Devices
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Design, Simulation and Applications of Inductors and Transformers for Si RF ICs
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Regular Fabrics in Deep Sub-Micron Integrated-Circuit Design
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High Performance Memory Testing: Design Principles, Fault Modeling and Self-Test
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Low-Power Design Techniques and CAD Tools for Analog and RF Integrated Circuits
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