High Performance Memory Testing: Design Principles, Fault Modeling and Self-Test
Are memory applications more critical than they have been in the past? Yes, but even more critical is the number of designs and the sheer number of bits on each design. It is assured that catastrophes, which were avoided in the past because memories were small, will easily occur if the design and te...
Main Author: | |
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Corporate Author: | |
Format: | Electronic eBook |
Language: | English |
Published: |
Boston, MA :
Springer US,
2003.
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Series: | Frontiers in Electronic Testing,
22A |
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Online Access: | Full Text via HEAL-Link |
Table of Contents:
- Test of Memories
- Opening Pandora’s Box
- Static Random Access Memories
- Multi-Port Memories
- Silicon On Insulator Memories
- Content Addressable Memories
- Dynamic Random Access Memories
- Non-Volatile Memories
- Memory Testing
- Memory Faults
- Memory Patterns
- Memory Self Test
- BIST Concepts
- State Machine BIST
- Micro-Code BIST
- BIST and Redundancy
- Design For Test and BIST
- Conclusions.