Low-Voltage CMOS Log Companding Analog Design
Low-Voltage CMOS Log Companding Analog Design presents in detail state-of-the-art analog circuit techniques for the very low-voltage and low-power design of systems-on-chip in CMOS technologies. The proposed strategy is mainly based on two bases: the Instantaneous Log Companding Theory, and the MOSF...
Κύριοι συγγραφείς: | Serra-Graells, Francisco (Συγγραφέας), Rueda, Adoración (Συγγραφέας), Huertas, José L. (Συγγραφέας) |
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Συγγραφή απο Οργανισμό/Αρχή: | SpringerLink (Online service) |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Boston, MA :
Springer US,
2003.
|
Σειρά: | The International Series in Engineering and Computer Science, Analog Circuits and Signal Processing,
733 |
Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
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