Power-constrained Testing of VLSI Circuits

• Main Authors: Nicolici, Nicola (Author), Al-Hashimi, Bashir M. (Author)
• Corporate Author: SpringerLink (Online service)
• Format: Electronic eBook
• Language: English
• Published: Boston, MA : Springer US, 2003.
• Series: Frontiers in Electronic Testing, 22B
• Subjects: Engineering.; Computer-aided engineering.; Electrical engineering.; Electronic circuits.; Circuits and Systems.; Electrical Engineering.; Computer-Aided Engineering (CAD, CAE) and Design.

Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to improve reliability and reduce packaging costs. While many techniques have investigated power minimization during the functional (normal) mode of operation, it is important to examine the power dissipati...

Table of Contents:

• Design and Test of Digital Integrated Circuits
• Power Dissipation During Test
• Approaches to Handle Test Power
• Power Minimization Based on Best Primary Input Change Time
• Test Power Minimization Using Multiple Scan Chains
• Power-conscious Test Synthesis and Scheduling
• Power Profile Manipulation
• Conclusion.