Παραπομπή σε μορφή APA (7η εκδ.)

Radecka, K., & Zilic, Z. (2003). Verification by Error Modeling: Using Testing Techniques in Hardware Verification. Springer US.

Παραπομπή σε μορφή Chicago (17η εκδ.)

Radecka, Katarzyna, και Zeljko Zilic. Verification by Error Modeling: Using Testing Techniques in Hardware Verification. Boston, MA: Springer US, 2003.

Παραπομπή σε μορφή MLA (8th εκδ.)

Radecka, Katarzyna, και Zeljko Zilic. Verification by Error Modeling: Using Testing Techniques in Hardware Verification. Springer US, 2003.