CMOS PLL Synthesizers: Analysis and Design

CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state of the art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is imp...

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Bibliographic Details
Main Authors: Shu, Keliu (Author), Sánchez-Sinencio, Edgar (Author)
Corporate Author: SpringerLink (Online service)
Format: Electronic eBook
Language:English
Published: Boston, MA : Springer US, 2005.
Series:The International Series in Engineering and Computer Science, Analog Circuits and Signal Processing, 783
Subjects:
Online Access:Full Text via HEAL-Link
Description
Summary:CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state of the art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is implemented in 0.35mm CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which elegantly tackle speed and integration bottlenecks of PLL synthesizer. This book is useful as a PLL synthesizer manual for both academic researchers and industry design engineers.
Physical Description:XVI, 216 p. 85 illus. online resource.
ISBN:9780387236698
ISSN:0893-3405 ;