CMOS PLL Synthesizers: Analysis and Design

• Κύριοι συγγραφείς: Shu, Keliu (Συγγραφέας), Sánchez-Sinencio, Edgar (Συγγραφέας)
• Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
• Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
• Γλώσσα: English
• Έκδοση: Boston, MA : Springer US, 2005.
• Σειρά: The International Series in Engineering and Computer Science, Analog Circuits and Signal Processing, 783
• Θέματα: Engineering.; Electrical engineering.; Electrical Engineering.

 CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state of the art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is implemented in 0.35mm CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which elegantly tackle speed and integration bottlenecks of PLL synthesizer. This book is useful as a PLL synthesizer manual for both academic researchers and industry design engineers. 

 Frequency Synthesizer for Wireless Applications -- PLL Frequency Synthesizer -- ?? Fractional-N PLL Synthesizer -- Enhanced Phase Switching Prescaler -- Loop Filter with Capacitance Multiplier -- Other Building Blocks of PLL -- Prototype Measurement Results -- Conclusions.