Interconnect Noise Optimization in Nanometer Technologies
Interconnect has become the dominating factor in determining system performance in nanometer technologies. Dedicated to this subject, Interconnect Noise Optimization in Nanometer Technologies provides insight and intuition into layout analysis and optimization for interconnect in high speed, high co...
Κύριοι συγγραφείς: | Elgamel, Mohamed A. (Συγγραφέας), Bayoumi, Magdy A. (Συγγραφέας) |
---|---|
Συγγραφή απο Οργανισμό/Αρχή: | SpringerLink (Online service) |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Boston, MA :
Springer US,
2006.
|
Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Παρόμοια τεκμήρια
-
Interconnect Noise Optimization in Nanometer Technologies
ανά: Elgamel, Mohamed A.
Έκδοση: (2006) -
Leakage in Nanometer CMOS Technologies
ανά: Narendra, Siva G., κ.ά.
Έκδοση: (2006) -
Principles of Verifiable RTL Design A Functional Coding Style Supporting Verification Processes in Verilog /
ανά: Bening, Lionel, κ.ά.
Έκδοση: (2000) -
Verilog® Quickstart A Practical Guide to Simulation and Synthesis in Verilog /
ανά: Lee, James M.
Έκδοση: (1999) -
Principles of Verifiable RTL Design A functional coding style supporting verification processes in Verilog /
ανά: Bening, Lionel, κ.ά.
Έκδοση: (2001)