Scalable Hardware Verification with Symbolic Simulation
Scalable Hardware Verification with Symbolic Simulation presents recent advancements in symbolic simulation-based solutions which radically improve scalability. It overviews current verification techniques, both based on logic simulation and formal verification methods, and unveils the inner working...
Κύριος συγγραφέας: | Bertacco, Valeria (Συγγραφέας) |
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Συγγραφή απο Οργανισμό/Αρχή: | SpringerLink (Online service) |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Boston, MA :
Springer US,
2006.
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Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
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Scalable Hardware Verification with Symbolic Simulation
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